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參數(shù)資料
型號： SI3220DC0-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 102/112頁
文件大?。?/td> 0K
描述： DAUGHTER CARD W/SI3200 INTERFACE
標準包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3220
已供物品： 板，CD
Si3220/25 Si3200/02
Rev. 1.3
9
Not
Recommended
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Table 4. 5 V Power Supply Characteristics1
(VDD, VDD1 – VDD4 = 5V, TA = 0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
VDD1 – VDD4 Supply
Current (Si3220/Si3225)
IVDD1–IVDD4
Sleep mode, RESET = 0
—
1
—
mA
Open (high-impedance)
—
22
—
mA
Active on-hook standby
—
21
—
mA
Forward/reverse active off-hook
—62 +
ILIM +
ABIAS
—mA
Forward/reverse active OHT
OBIAS = 4 mA
—65—
mA
Ringing, VRING =45Vrms,
VBAT = –70 V, 1 REN load
—31—
mA
VDD Supply Current
(Si3200/2)
IVDD
Sleep mode, RESET = 0
—
110
—
A
Open (high-impedance)
—
110
—
A
Active on-hook standby
—
110
—
A
Forward/reverse active off-hook,
ABIAS = 4 mA, VBAT =–24 V
—110
—
A
Forward/reverse OHT, OBIAS = 4 mA,
VBAT =–70 V
—110
—
A
Ringing, VRING =45Vrms,
VBAT = –70 V,
1 REN load
—110
—
A
Notes:
1. All specifications are for a single channel based on measurements with both channels in the same operating state.
2. See "3.14.4. Ringing Power Considerations" on page 54 for current and power consumption under other operating
conditions.
3. Power consumption does not include additional power required for dc loop feed. Total system power consumption must
include an additional (VDD + |VBAT|) x ILOOP term.
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