參數(shù)資料
型號: SI3210-BT
廠商: Silicon Laboratories Inc
文件頁數(shù): 41/148頁
文件大?。?/td> 0K
描述: IC SLIC/CODEC PROG 38TSSOP
標(biāo)準(zhǔn)包裝: 50
系列: ProSLIC®
功能: 用戶線路接口概念(SLIC),CODEC
接口: PCM,SPI
電路數(shù): 1
電源電壓: 3.3V,5V
電流 - 電源: 88mA
功率(瓦特): 700mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 38-TFSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 38-TSSOP
包裝: 管件
包括: BORSCHT 功能,DTMF 生成和解碼,F(xiàn)SK 生成,脈沖測量生成,語音回送測試模式
Si3210/Si3211
Rev. 1.61
135
Not
Recommended
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Table 49. QFN-38 PCB Land Pattern Dimensions
Dimension
Feature
Min.
Max.
C1
Pad column spacing
4.70
4.80
C2
Pad row spacing
6.70
6.80
E
Pad pitch
0.50 BSC
X1
Pin pad width
0.20
0.30
X2
Thermal pad width
3.20
3.30
Y1
Pin pad width
0.80
0.90
Y2
Thermal pad length
5.20
5.30
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60
m minimum, all the way around the pad.
Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
to assure good solder paste release.
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads
4. A 3x5 array of 0.90mm square openings on 1.10mm pitch should be used for the center
ground pad.
Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPEC J-STD-020C specification for
Small Body Components.
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