參數(shù)資料
型號: SI3063-F-FS
廠商: Silicon Laboratories Inc
文件頁數(shù): 24/62頁
文件大?。?/td> 0K
描述: IC DAA ENH GLOB LINE-SIDE 16SOIC
標準包裝: 48
功能: 直接存取裝置(DAA)
電路數(shù): 1
電流 - 電源: 9mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC N
包裝: 管件
包括: 結帳音調檢測,線路電壓監(jiān)視器,回路電流監(jiān)視器,過載檢測,振鈴檢測器
Si306x
30
Rev. 0.9
Reset settings = 0000_0011
Register 2. Control 2
Bit
D7D6
D5
D4
D3D2D1
D0
Name
INTE
INTP
WDTEN
RDI
HBE
RXE
Type
R/W
Bit
Name
Function
7INTE
Interrupt Pin Enable.
0=The INT port is disabled.
1=The INT port is enabled.
6INTP
Interrupt Polarity Select.
0=The INT port is active low.
1=The INT port is active high.
5
Reserved Returns to zero.
4WDTEN
Watchdog Timer Enable.
When set, this bit can only be cleared by a hardware reset. The watchdog timer monitors
register accesses. If no register accesses occur within a 4 second window, the DAA is put into
an on-hook state. A write of a DAA register restarts the watchdog timer counter. If the
watchdog timer times out, the OH bit is cleared, placing the DAA into an on-hook state.
Setting the OH bit places the DAA back into an off-hook state.
0 = Watchdog timer disabled.
1 = Watchdog timer enabled.
3
Reserved Returns to zero.
2RDI
Ring Detect Interrupt Mode.
This bit operates in conjunction with the RDTM and RDTI bits. This bit is selected if one or two
interrupts are generated for every ring burst.
0 = An interrupt is generated at the beginning of every ring burst.
1 = An interrupt is generated at the beginning and end of every ring burst. The interrupt at the
beginning of the ring burst must be serviced (by writing a 0 to the RDTI bit) before the end of
the ring burst for both interrupts to occur.
1HBE
Hybrid Enable.
0 = Disconnects hybrid in transmit path.
1 = Connects hybrid in transmit path.
0RXE
Receive Enable.
0 = Receive path disabled.
1 = Enables receive path.
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