參數(shù)資料
型號(hào)： SI3062-F-FS
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 11/62頁(yè)
文件大小： 0K
描述： IC DAA ENH FCC LINE-SIDE 16SOIC
標(biāo)準(zhǔn)包裝： 48
功能： 直接存取裝置（DAA）
電路數(shù)： 1
電流 - 電源： 9mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC N
包裝： 管件
包括： 結(jié)帳音調(diào)檢測(cè)，線路電壓監(jiān)視器，回路電流監(jiān)視器，過(guò)載檢測(cè)，振鈴檢測(cè)器
Si306x
Rev. 0.9
19
and off-hook.
These registers can help determine the following:
When on-hook, detect if a line is connected.
When on-hook, detect if a parallel phone is off-hook.
When off-hook, detect if a parallel phone goes on or
off-hook.
Detect if enough loop current is available to operate.
When used in conjunction with the OPD bit, detect if
an overload condition exists (See "6.25. Overload
6.11.1. Line Voltage Measurement (Si3062, Si3063,
and Si3065 Only)
The Si3062, Si3063, and Si3065 devices report line
voltage with the LVS[7:0] bits (Register 29) in both on-
and off-hook states with a resolution of 1 V per bit. The
accuracy of these bits is approximately ±10%. Bits 0
through 6 of this register indicate the value of the line
voltage in 2s compliment format. Bit 7 of this register
indicates the polarity of the tip/ring voltage.
If the INTE bit (Register 2) and the POLM bit (Register
3) are set, a hardware interrupt is generated on the
AOUT/INT pin when bit 7 of the LVS register changes
state. The edge-triggered interrupt is cleared by writing
0 to the POLI bit (Register 4). The POLI bit is set each
time bit 7 of the LVS register changes state and must be
written to 0 to clear it.
The default state of the LVS register forces the LVS bits
to 0 when the line voltage is 3 V or less. The LVFD bit
(Register 31, bit 0) disables the force-to-zero function
and allows the LVS register to display non-zero values
of 3 V and below. This register might display
unpredictable values at line voltages between 0 to 2 V.
At 0 V, the LVS register displays all 0s.
6.11.2. Loop Current Measurement
When the DAA is off-hook, the LCS[4:0] bits measure
loop current in 3.3 mA/bit resolution. These bits enable
detection of another phone going off-hook by monitoring
the dc loop current. The line current sense transfer
function is shown in Figure 4 and detailed in Table 9.
The LCS and LCS2 bits report loop current down to the
minimum operating loop current for the DAA. Below this
threshold, the reported value of loop current is
unpredictable.
Figure 4. Typical Loop Current LCS Transfer Function
0
3.3
6.6
9.9 13.2 16.5 19.8 23.1 26.4
33 36.3 39.6 42.9 46.2 49.5 52.8 56.1 59.1 62.7 66
69.3 72.6 75.9 79.2
127
82.5 85.8 89.1 92.4 95.7 99 102.3
Loop Current (mA)
LCS
BITS
29.7
0
5
10
15
20
25
30
Overload
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI3062-F-FSR 制造商:Silicon Laboratories Inc 功能描述:INTEGRATED DIRECT ACCESS ARRANGEMENT 16SOIC - Tape and Reel
SI3062-X-FS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
SI3063 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
Si3063-F-FS 功能描述:電信線路管理 IC Enhanced V.92 Global Line-Side RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3063-F-FSR 制造商:Silicon Laboratories Inc 功能描述:INTEGRATED DIRECT ACCESS ARRANGEMENT 16SOIC - Tape and Reel
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