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參數(shù)資料
| 型號(hào)： | SI3056-D-FS |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 70/94頁 |
| 文件大小： | 0K |
| 描述： | IC SYSTEM-SIDE DAA 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 數(shù)據(jù)格式： | V.92 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 管件 |
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Si3056
Si3018/19/10
72
Rev. 1.05
Register 31. DAA Control 3
Bit
D7
D6D5D4
D3
D2D1D0
Name
FULL
FOH[1:0]
OHS2
FILT
LVFD
Type
R/W
Bit
Name
Function
7FULL
Full Scale Transmit and Receive Mode (Si3019 line-side device only).
0=Default.
1 = Transmit/receive full scale.
This bit changes the full scale of the ADC and DAC from 0 min to +3.2 dBm into a 600
load
(or 1 dBV into all reference impedances). When this bit is set, the DCV[1:0] bits (Register 26)
should be set to all 1s to avoid distortion at low loop currents.
6:5
FOH[1:0]
Fast Off-Hook Selection.
These bits determine the length of the off-hook counter. The default setting is 128 ms.
00 = 512 ms.
01 = 128 ms.
10 = 64 ms.
11 = 8 ms.
4
Reserved Read returns zero.
3OHS2
On-Hook Speed 2.
This bit, in combination with the OHS bit (Register 16) and the SQ[1:0] bits on-hook speeds
specified are measured from the time the OH bit is cleared until loop current equals zero.
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
0
00
Less than 0.5 ms
0
1
00
3 ms ±10% (meets ETSI standard)
1
X
11
26 ms ±10% (meets Australia spark quenching spec)
2
Reserved Read returns zero.
1FILT
Filter Pole Selection (Si3019 line-side device only).
0 = The receive path has a low –3 dBFS corner at 5 Hz.
1 = The receive path has a low –3 dBFS corner at 200 Hz.
0LVFD
Line Voltage Force Disable (Si3019 line-side device only).
0 = Normal operation.
1 = The circuitry that forces the LVS register (Register 29) to all 0s at 3 V or less is disabled.
The LVS register may display unpredictable values at voltages between 0 to 2 V. All 0s are
displayed if the line voltage is 0 V.
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