參數(shù)資料
型號: SG6902
廠商: Fairchild Semiconductor Corporation
英文描述: Green-Mode PFC / Flyback-PWM Controller
中文描述: 綠色模式PFC /反激式,PWM控制器
文件頁數(shù): 19/22頁
文件大?。?/td> 863K
代理商: SG6902
Product Specification
Green-Mode PFC / Flyback-PWM Controller
SG6902
System General Corp.
Version 1.3.1 (IAO33.0022.B3)
- 19 -
www.sg.com.tw www.fairchildsemi.com
September, 2007
PCB Layout
SG6902 has two ground pins. Good high-frequency or RF
layout practices should be followed. Avoid long PCB
traces and component leads. Locate decoupling capacitors
near the SG6902. A resistor (5 ~ 20
Ω
) is recommended,
connected in series from the OPFC and OPWM, to the
gate of the MOSFET.
Isolating the interference between the PFC and PWM
stages is also important. Figure 10 shows an example of
the PCB layout. The
ground
trace
connected from the
AGND pin to the decoupling capacitor should be low
impedance and as short as possible. The
ground trace 1
provides a signal ground and should be connected directly
to the decoupling capacitor V
DD
and/or to the AGND pin.
The
ground trace
2 shows that the AGND pins should
connect to the PFC output capacitor C
O
independently.
The
ground trace 3
is independently tied from the PGND
to the PFC output capacitor C
O
. The ground in the output
capacitor C
O
is the major ground reference for power
switching. To provide a good ground reference and
reduce switching noise of both the PFC and PWM stages,
the
ground traces 6 and 7
should be located very near and
be low impedance.
The IPFC pin is connected directly to R
S
through R
3
to
improve noise immunity (do not incorrectly connect to
ground trace 2). The IMP and ISENSE pins should be
connected directly via the resistors R
2
and R
P
to another
terminal of R
S
. Because the
ground trace 4 and 5
are PFC
and PWM stages of the current loop, they should be as
short as possible.
Fig.10 Layout Considerations
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