
Product Specification
Green-Mode PFC / Flyback-PWM Controller
SG6902
System General Corp.
Version 1.3.1 (IAO33.0022.B3)
- 17 -
www.sg.com.tw www.fairchildsemi.com
September, 2007
Multi-vector Error Amplifier
The voltage-loop error amplifier is transconductance,
which has high output impedance (> 90k
Ω
). A capacitor
C
EA
(1μ ~ 10μF) connected from VEA to ground provides
a dominant pole for the voltage loop. Although the PFC
stage has a low bandwidth voltage loop for better input
power factor, the innovative multi-vector error amplifier
provides a fast transient response to clamp the overshoot
and undershoot of the PFC output voltage.
Figure 6 shows the block diagram of the multi-vector
error amplifier. When the variation of the feedback
voltage exceeds
±
5% of the reference voltage, the
transconductance error amplifier adjusts its output
impedance to increase the loop response. If R
A
is opened,
SG6902 shuts off immediately to prevent extra-high
voltage on the output capacitor.
FIG.6 Multi-vector Error Amplifier
PFC Over-Voltage Protection (OVP)
When the OVP feedback voltage exceeds the
over-voltage threshold, the SG6902 inhibits the PFC
switching signal. This protection also prevents the PFC
power converter from operating abnormally while the
FBPFC pin is open.
Cycle-by-Cycle Current Limiting
SG6902 provides cycle-by-cycle current limiting for both
PFC and PWM stages. Figure 7 shows the peak current
limit for the PFC stage. The PFC gate drive is terminated
once the voltage on the ISENSE pin goes below V
PK
.
The voltage of V
RMS
determines the voltage of V
PK
. The
relationship between V
PK
and V
RMS
is shown in Figure 7.
The amplitude of the constant current, I
P
, is determined by
the internal current reference, I
T
, according to the
following equation:
I
T
P
R
1.2V
2
I
2
=
I
×
=
×
---------------------
(8)
The peak current of the I
S
is given by (V
RMS
<1.05V):
S
P
R
P
S_peak
I
0.2V
-
R
(I
×
=
------------------
(9)
FIG.7 V
RMS
Controlled Current Limiting
Flyback PWM and Slope Compensation
As shown in Figure 8, peak-current-mode control is
utilized for flyback PWM. The SG6902 inserts a
synchronized 0.5V ramp at the beginning of each
switching cycle. This built-in slope compensation ensures
stable operation for continuous-current-mode operation.
When the IPWM voltage, across the sense resistor,
reaches the threshold voltage, 0.65V or 0.7V selected by
RANGE, the OPWM is turned off after a small
propagation delay, T
PD-PWM
. This propagation delay
introduces
additional
current,
T
PD-PWM
V
PFC
/L
p
, where V
PFC
is the output voltage of PFC
and L
p
is the magnetized inductance of the flyback
transformer. Since the propagation delay is nearly
constant,
higher V
PFC
results in a larger additional current
proportional
to