參數(shù)資料
型號: SG6901ASZ
廠商: Fairchild Semiconductor
文件頁數(shù): 15/19頁
文件大小: 714K
描述: IC PFC CTLR AVERAGE CURR 20SOIC
標準包裝: 1
模式: 平均電流
頻率 - 開關(guān): 65kHz
電流 - 啟動: 10µA
電源電壓: 12 V ~ 20 V
工作溫度: -30°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC
包裝: 標準包裝
其它名稱: SG6901ASZDKR
 
?2008 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
SG6901A " Rev. 1.0.2
15
Functional Description
SG6901A is a highly integrated PFC/PWM combination
controller. Many functions and protections are built in to
provide a compact design. The following sections
describe the operation and function.
Switching Frequency and Current Sources
The switching frequency can be programmed by the
resistor RI connected between RI pin and GND. The
relationship is:
(kHz)
)
 
(k&
 
R
1560
 
f
I
OSC
=
 
(1)
For example, a 24K& resistor R
I 
results in a 65KHz
switching frequency. Accordingly, a constant current, I
T
,
flows through R
I
:
(mA)
)
 
(k&
 
R
1.2V
I
I
T
=
 
(2)
I
T
 is used to generate internal current reference.
Line Voltage Detection (VRMS)
Figure 24 shows a resistive divider with low-pass
filtering for line-voltage detection on the VRMS pin. The
VRMS voltage is used for the PFC multiplier, brownout
protection, and range control.
For brownout protection, SG6901A is disabled with a
195ms delay if the voltage VRMS drops below 0.8V.
For PFC multiplier and range control, refer to the PFC
Operation section below for details.
 
Figure 24. Line Voltage Detection Circuit
Interleave Switching
The    SG6901A    uses    interleaved    switching    to
synchronize   the   PFC   and   flyback   stages,   which
reduces   switching   noise   and   spreads   the   EMI
emissions. Figure 25 shows off-time, t
OFF
, inserted
between the turn-off of the PFC gate drive and the turn-
on of the PWM.
For an universal input (90 ~ 264V
AC
) power supply
applying active boost PFC and flyback as a second
stage, the output voltage of PFC is usually designed
around 250V at low line and 390V at high line. This can
improve the efficiency at low-line input. The RANGE pin
(open-drain structure) is used for the two-level output
voltage setting.
 
Figure 25. Interleaved Switching Pattern
PFC Operation
The purpose of a boost active power factor corrector
(PFC) is to shape the input current of a power supply.
The input current waveform and phase follow that of the
input voltage. Average-current-mode control is utilized
for continuous-current-mode operation for the PFC
booster. With the innovative multi-vector control for
voltage loop and switching charge multiplier-divider for
current   reference,   excellent   input   power   factor   is
achieved   with   good   noise   immunity   and   transient
response. Figure 26 shows the total control loop for the
average-current-mode control circuit.
The current source output from the switching charge
multiplier-divider can be expressed as:
(  )
礎(chǔ)
V
V
I
K
I
RMS
EA
AC
MO
2
?/DIV>
?/DIV>
=
 
(3)
As shown in Figure 26, the current output from the IMP
pin is the summation of IMO and IMR1. IMR1 and IMR2
are identical fixed-current sources used to pull high the
operating point of the IMP and IPFC pins since the
voltage across RS goes negative with respect to
ground. Constant current sources IMR1 and IMR2 are
typically 60礎(chǔ).
Through the differential amplification of the signal
across R
S
, better noise immunity is achieved. The
output of IEA is compared with an internal sawtooth
and the pulse width for PFC is determined. Through the
average current-mode control loop, the input current I
S
 
is proportional to IMO:
S
S
2
MO
R
I
R
I
 
(4)
According to Equation 4, the minimum value of R
2
 and
maximum of R
S
 can be determined since IMO should
not exceed the specified maximum value.
There are different concerns in determining the value of
the sense resistor R
S
. The value of R
S
 should be small
enough   to   reduce   power   consumption,   but   large
enough    to    maintain    the    resolution.    A    current
transformer (CT) may be used to improve efficiency of
high-power converters.
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