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參數(shù)資料
| 型號： | SDA9380-B21 |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 消費家電 |
| 英文描述： | EDDC Enhanced Deflection Controller and RGB Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, MQFP-64 |
| 文件頁數(shù)： | 3/72頁 |
| 文件大?。?/td> | 366K |
| 代理商： | SDA9380-B21 |
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SDA 9380 - B21
Preliminary Data Sheet
Micronas
ii
2001-01-29
24.03.99
29.03.99
29.03.99
30.03.99
07.04.99
12.04.99
46
22
25
26
38
DAC output D/A: DNL changed from +-0.5 LSB to +-1 LSB
IIC bus: ABLTCS1, 0 added
IIC bus: GAIN2 added, MODE changed
IIC bus: Peak drive limit, bit 3 added (hidden bit for Black stretch)
Input BSOIN: hysteresis added
IIC bus: ABLTCS1, 0 deleted, MODE default field frequent, Tdown
independent of MODE, default value for IIC reg. 27h set to -64
18.75kHz only possible with internal clock generation
I2C bus specification completed
Hysteresis of H35K, H38K adjusted
PWMC data corrected in case of PWM output is used as switch output
Power-on reset thresholds added
default range of input IBEAM changed
22, 25, 15
13.04.99
19.04.99
19.04.99
19.04.99
20.04.99
20.04.99
12
45, 46
48
19
53
17, 28, 29,
39
17, 42
24, 50
49
39
20.04.99
28.04.99
28.04.99
29.04.99
29.04.99 3,4,5,27,46 New output pin PROTON added
29.04.99 3,4,6,30,46 New output pin VBLO added
11.05.99
51, 52
Application information added
21.05.99
15, 43
Nominal saturation changed to -11
31.05.99
9
Delay of BG-pulse to HSYNC in internal clock mode changed
08.06.99
24, 40, 41
Differential input for RGB/YUV 1 removed
10.06.99
30
V-blanking component of SCP corresponds with internal blanking VBL
24.06.99
1, 2
RGB 1 input changed to RGB/YUV1, COR feature added
24.06.99
5
Test pins changed
24.06.99
12, 54, 55
Reset modes of IIC-Registers changed, POR delay changed to 32768
24.06.99 6,12,38,39,
42, 46, 47,
48, 54, 55
24.06.99
40, 51, 52
External capacitances of the quartz oscillator changed to 15pF
24.06.99
40, 41
YUV and RGB inputs bias voltages added
24.06.99
43
Nominal value of saturation changed
24.06.99
46, 47
DAC outputs (E/W, D/A, VD+, VD-) changed
24.06.99
50
SVM output: black level added
24.06.99
54
POR levels changed
28.06.99
12, 58
Text RGB processing, diagrams black stretch and soft clipping added
29.06.99
8
Second paragraph changed (protection circuit)
30.06.99
29
Equations of Vertical EHT compensation changed
I2C bit RDCI added for switching of DCI input range
Delay from SVM to RGB outputs reduced
Min. Bandwidth of RGB outputs specified
Pins for reference voltages VREFP, VREFL deleted
VREFP and VREFL removed, VREFH and VREFC changed
DS
1
Date
Page
Changes compared to previous issue
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相關(guān)代理商/技術(shù)參數(shù) |
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| SDA9388X | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Single-Chip Picture in Picture IC |
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| SDA9401 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Scan Rate Converter using Embedded DRAM Technology Units |
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| SDA9415-B13 | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Display Processor and Scan Rate Converter |
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