參數(shù)資料
型號: SDA5251M
廠商: SIEMENS A G
元件分類: 圖文
英文描述: ICs for Consumer Electronics
中文描述: TELETEXT AND VPS/PDC DECODER, PQFP64
文件頁數(shù): 116/143頁
文件大?。?/td> 1050K
代理商: SDA5251M
SDA 525x
Semiconductor Group
116
1998-04-08
6.3.14
The assembly language uses the same instruction set and the same instruction opcodes
as the 8051 microcomputer family.
Instruction Set
6.3.14.1
Rn
direct
@Ri
#data
#data 16
bit
Notes on Data Addressing Modes
Working register R0 – R7.
128 internal RAM-locations, any I/O-port, control or status register.
Indirect internal RAM-location addressed by register R0 or R1.
8-bit constant included in instruction.
16-bit constant included as bytes 2 & 3 of instruction.
128 software flags, any I/O-pin, control or status bit in special
function registers.
Operations working on external data memory (MOVX …) are used to access the
extended internal data RAM (XRAM).
6.3.14.2
addr 16
Notes on Program Addressing Modes
Destination address for LCALL & LJMP may be anywhere within the
program memory address space.
Destination address for ACALL & AJMP will be within the same
2 Kbyte of the following instruction.
SJMP and all conditional jumps include an 8-bit offset byte. Range is
+ 127/ – 128 bytes relative to first byte of the following instruction.
addr 11
rel
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