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參數(shù)資料
| 型號： | SCN68661 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Enhanced programmable communications interface EPCI |
| 中文描述： | 增強的可編程通信接口到ePCI |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 131K |
| 代理商： | SCN68661 |
Philips Semiconductors
Product specification
SCN2661/SCN68661
Enhanced programmable communications
interface (EPCI)
1994 Apr 27
13
Table 9.
68661 EPCI vs 2651 PCI
FEATURE
EPCI
PCI
1. MR2 BIT 6, 7
Control pins 9, 25
Not used
2. DLE detect – SR3
SR3 = 0 for DLE–DLE, DLE – SYN1
SR3 = 1 for DLE–DLE, DLE – SYN1
3. Reset of SR3, DLE detect
Second character after DLE, or receiver
disable, or CR4 = 1
One time command
Receiver disable, or CR4 = 1
4. Send DLE – CR3
Reset via CR3 on next TxRDY
5. DLE stuffing in transparent mode
Automatic DLE stuffing when DLE is loaded
except if CR3 = 1
All SYN1
None
6. SYN1
non-transparent mode
7. Baud rate versions
stripping
in
double
sync
First SYN1 of pair
Three
One
8. Terminate ASYNC transmission (drop
RTS)
Reset CR5 in response to TxEMT changing
from 1 to 0
Reset CR0 when TxEMT goes from 1 to 0.
Then reset CR5 when TxEMT goes from
1 to 0
9. Break detect
Pin 25
*
FE and null character
10. Stop bit searched
One
Pin 9
**
Two
11. External jam sync
No
12. Data bus timing
Improved over 2651
—
13. Data bus drivers
Sink 2.2mA
Source 400
μ
A
Sink 1.6mA
Source 100
μ
A
NOTES:
*
Internal BRG used for RxC.
** Internal BRG used for TxC.
AC LOAD CONDITIONS
C
L
= 150pF
NOTES:
Open-drain outputs.
C
L
= Load capacitance includes JIG and probe capacitance.
2.2V
OUTPUT
750
C
L
= 50pF
+5V
OUTPUT
2k
SD00080
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| SCN2661AC1A28 | Enhanced programmable communications interface EPCI |
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