參數資料
型號: SCANSTA111SM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: EMITTER IR 850NM 5MM RADIAL
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PBGA49
封裝: BGA-49
文件頁數: 20/29頁
文件大?。?/td> 524K
代理商: SCANSTA111SM
Special Features
(Continued)
This moves the local chain TAP Controllers to the synchro-
nization state (
Run-Test/Idle
), where they stay until synchro-
nization occurs. If the next state of the ’STA111 TAP Control-
ler is
Run-Test/Idle
, TMS
is connected to TMS
and the
local TAP Controllers are synchronized to the ’STA111 TAP
Controller as shown in
Figure 12
. If the next state after
Update-IR
were
Select-DR
, TMS
would remain low and
synchronization would not occur until the ’STA111 TAP Con-
troller entered the
Run-Test/Idle
state, as shown in
Figure
11
.
Each local port has its own Local Scan Port Controller. This
is necessary because the LSPN can be configured in any
one of eight (8) possible combinations. Either one, some, or
all of the local ports can be accessed simultaneously. Con-
figuring the LSPN is accomplished with Mode Register
0
, in
conjunction with the
UNPARK
instruction.
The LSPN can be unparked in one of seven different con-
figurations (Si device), as specified by bits 0-2 of Mode
Register
. Using multiple ports presents not only the task of
synchronizing the ’STA111 TAP Controller with the TAP Con-
trollers of an individual local port, but also of synchronizing
the individual local ports to one another.
When multiple local ports are selected for access, it is pos-
sible that two ports are parked in different states. This could
occur when previous operations accessed the two ports
separately and parked them in the two different states. The
LSP Controllers handle this situation gracefully.
Figure 12
shows the
UNPARK
instruction being used to access LSP
0
,
LSP
1
, and LSP
2
in series (Mode Register
0
= XXX0X111
binary). LSP
0
and LSP
1
become active as the ’STA111 con-
troller is sequenced through the
Run-Test/Idle
state. LSP
2
remains parked in the
Pause-DR
state until the ’STA111 TAP
Controller is sequenced through the
Pause-DR
state. At that
point, all three local ports are synchronized for access via
the active scan chain.
PARAMETERIZED DESIGN (HDL)
In order to support a large number of applications, the
STA111 HDL is to parameterized as described:
Number of Local Scan Ports (LSPs):
The STA111 HDL
is able to simulate/synthesize a device that contains from
1 to 8 LSPs. LSP
through LSP
are controlled via Mode
Register
and LSP
5
through LSP
7
are controlled via
Mode Register
1
.
Number of Address Pins:
The STA111 has a selectable
number of address bits (S
- S
, where n can range from
5 to 7). Addresses 3A through 3F hex are reserved for
address interrogation, broadcast and multi-cast address-
ing.
Pass-Through Pins:
Each of the LSPs (0-n) may selec-
tivly have or not have Pass-through pins. Pass-through
pins are described in more detail below.
10124514
FIGURE 11. Local Scan Port Synchronization on Second Pass
10124515
FIGURE 12. Synchronization of the Three Local Scan Ports
S
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