參數(shù)資料
型號: SCANPSC110FDMQB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support)
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, CDIP28
封裝: CERAMIC, DIP-28
文件頁數(shù): 5/29頁
文件大?。?/td> 459K
代理商: SCANPSC110FDMQB
Overview of SCANPSC110F Bridge
Functions
(Continued)
In multi-drop scan systems, a scan tester can select indi-
vidual ’PSC110Fs for participation in upcoming scan opera-
tions. ’PSC110F “selection” is accomplished by simulta-
neously
scanning
a
device
address
out
to
multiple
’PSC110Fs. Through an on-chip address matching process,
only those ’PSC110Fs whose statically-assigned address
matches the scanned-out address become selected to re-
ceive further instructions from the scan tester. ’PSC110F se-
lection is done using a “Level-1” protocol, while follow-on in-
structions are sent to selected ’PSC110Fs by using a
“Level-2” protocol.
The
state-machines (see Figure 2 ). The first of these is the
TAP-control state-machine, which is used to drive the
’PSC110Fs scan ports in conformance with the 1149.1 Stan-
dard (see Figure 17 of appendix). The second is the
’PSC110F-selection state-machine (Figure 3). The third
state-machine actually consists of three identical but inde-
pendent state-machines (see Figure 4), one per ’PSC110F
local
scan
port.
Each
of
state-machines allows individual local ports to be inserted
into and removed from the ’PSC110Fs overall scan chain.
’PSC110F
contains
three
distinct
but
coupled
these
scan
port-selection
The ’PSC110F selection state-machine performs the ad-
dress matching which gives the ’PSC110F its multi-drop ca-
pability. That
logic
supports
multi-cast,
and
broadcast.
state-machine implements the chip’s Level-1 protocol.
single-’PSC110F
The
’PSC110F-selection
access,
DS100327-4
FIGURE 2. SCANPSC110F Bridge State Machines
S
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