參數(shù)資料
型號(hào): SCAN1837TSSC
廠商: Fairchild Semiconductor Corporation
英文描述: Transparent Latch with 3-STATE Outputs
中文描述: 透明鎖存器與三態(tài)輸出
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 99K
代理商: SCAN1837TSSC
11
www.fairchildsemi.com
S
Extended AC Electrical Characteristics
Note 16:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 17:
This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 18:
3-STATE delays are load dominated and have been excluded from the datasheet.
Note 19:
The Output Disable Time is dominated by the RC network (500
, 250 pF) on the output and has been excluded from the datasheet.
Note 20:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH.
Capacitance
Symbol
Parameter
T
A
=
25
°
C
V
CC
=
5.0V
C
L
=
50 pF
Units
T
A
=
40
°
C to
+
85
°
C
V
CC
=
5.0V
±
0.5V
C
L
=
250 pF
(Note 17)
Min
4.0
4.0
18 Outputs
Switching
(Note 16)
Typ
Min
3.0
3.0
Max
12.0
12.8
Max
13.5
16.0
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
(Note 20)
t
OSLH
(Note 20)
Propagation Delay
Latch Enable to Output
ns
Propagation Delay
Data to Output
Output Enable Time
3.0
3.0
2.5
11.5
11.5
10.5
4.0
4.0
13.0
14.5
ns
(Note 18)
ns
2.5
2.0
2.0
12.5
10.5
10.5
Output Disable Time
(Note 19)
ns
Pin to Pin Skew
HL Data to Output
Pin to Pin Skew
0.5
1.0
1.0
ns
0.5
1.0
1.0
ns
LH Data to Output
Symbol
C
IN
C
OUT
C
PD
Parameter
Typ
4.0
13.0
Units
pF
pF
Conditions
V
CC
=
5.0V
V
CC
=
5.0V
V
CC
=
5.0V
Input Pin Capacitance
Output Pin Capacitance
Power Dissipation Capacitance
34.0
pF
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