參數(shù)資料
型號(hào)： SCAN182374ASSCX
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 總線收發(fā)器
中文描述： SCAN/JTAG/3J SERIES, 9-BIT BOUNDARY SCAN MEMORY DRIVER, TRUE OUTPUT, PDSO56
封裝： 0.300 INCH, MO-118, SSOP-56
文件頁數(shù)： 1/12頁
文件大?。?/td> 103K
代理商： SCAN182374ASSCX
2000 Fairchild Semiconductor Corporation
DS011545
www.fairchildsemi.com
January 1993
Revised August 2000
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SCAN182374A
D-Type Flip-Flop with 25
Series Resistor Outputs
General Description
The SCAN182374A is a high performance BiCMOS D-type
flip-flop featuring separate D-type inputs organized into
dual 9-bit bytes with byte-oriented clock and output enable
control signals. This device is compliant with IEEE 1149.1
Standard Test Access Port and Boundary Scan Architec-
ture with the incorporation of the defined boundary-scan
test logic and test access port consisting of Test Data Input
(TDI), Test Data Out (TDO), Test Mode Select (TMS), and
Test Clock (TCK).
Features
s IEEE 1149.1 (JTAG) Compliant
s High performance BiCMOS technology
s 25
series resistor outputs eliminate need for external
terminating resistors
s Buffered positive edge-triggered clock
s 3-STATE outputs for bus-oriented applications
s 25 mil pitch SSOP (Shrink Small Outline Package)
s Includes CLAMP, IDCODE and HIGHZ instructions
s Additional instructions SAMPLE-IN, SAMPLE-OUT and
EXTEST-OUT
s Power up 3-STATE for hot insert
s Member of Fairchild’s SCAN Products
Ordering Code:
Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Truth Tables
H
= HIGH Voltage Level
Z
= High Impedance
L
= LOW Voltage Level
= L-to-H Transition
X
= Immaterial
Note 1: Inactive-to-active transition must occur to enable outputs upon
power-up.
Order Number
Package Number
Package Description
SCAN182374ASSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
Pin Names
Description
AI(0–8), BI(0–8)
Data Inputs
ACP, BCP
Clock Pulse Inputs
AOE1, BOE1
3-STATE Output Enable Inputs
AO(0–8), BO(0–8)
3-STATE Outputs
Inputs
AO(0–8)
ACP
AOE1
(Note 1)
AI(0–8)
XH
X
Z
LLL
LH
H
Inputs
BO(0–8)
BCP
BOE1
(Note 1)
BI(0–8)
XH
X
Z
LLL
LH
H
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