SC417/SC427
14
Pin Descriptions
Pin #    Pin Name  Pin Function
1
FB
Feedback input for switching regulator used to program the output voltage connect to an external resis-
tor divider from VOUT to AGND.
2
FBL
Feedback input for the LDO connect to an external resistor divider from VLDO to AGND used to pro-
gram the LDO output.
3
V5V
5V power input for internal analog circuits and gate drives connect to external 5V supply or configure
the LDO for 5V and connect to VLDO.
4, 30, PAD 1    AGND    Analog ground
5
VOUT
Switcher output voltage sense pin also the input to the internal switch-over between VOUT and VLDO.
The voltage at this pin must be less than or equal to the voltage at the V5V pin.
6, 9-11,
PAD 2
VIN    Input supply voltage
7
VLDO    LDO output The voltage at this pin must be less than or equal to the voltage at the V5V pin.
8
BST
Bootstrap pin connect a capacitor of at least 100nF from BST to LX to develop the floating supply for the
high-side gate drive.
12
DH    High-side gate drive do not connect this pin
13
LXBST    LX Boost connect to the BST capacitor.
23-25, PAD 3
LX    Switching (phase) node
14
DL    Low-side gate drive do not connect this pin
15-22
PGND    Power ground
26
PGOOD
Open-drain power good indicator high impedance indicates power is good. An external pull-up
resistor is required.
27
ILIM    Current limit sense pin used to program the current limit by connecting a resistor from ILIM to LX.
28
LXS    LX sense connects to R
ILIM
.
29
EN/PSV
Enable/power-save input for the switching regulator connect to AGND to disable the switching regulator.
Float to operate in forced continuous mode (power-save disabled). SC417 connect to V5V to operate with
ultra-sonic power-save mode enabled. SC427 connect to V5V to operate with power-save mode enabled
with no minimum frequency.
31
TON    On-time programming input set the on-time by connecting through a resistor to AGND
32
ENL
Enable input for the LDO connect ENL to AGND to disable the LDO. Drive with logic to +3V for logic con-
trol, or program the VIN UVLO with a resistor divider between VIN, ENL, and AGND.