參數(shù)資料
型號: SC28L92A1BS,528
廠商: NXP Semiconductors
文件頁數(shù): 66/73頁
文件大?。?/td> 0K
描述: IC UART DUAL W/FIFO 44PQFP
標(biāo)準(zhǔn)包裝: 4,000
系列: IMPACT
特點(diǎn): 故障啟動位檢測
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-HVQFN EP(6x6)
包裝: 帶卷 (TR)
其它名稱: 935281063528
SC28L92A1BS-F
SC28L92A1BS-F-ND
69
2552K–AVR–04/11
ATmega329/3290/649/6490
PCINT15, Pin Change Interrupt source 15: The PB7 pin can serve as an external interrupt
source.
OC1B/PCINT14, Bit 6
OC1B, Output Compare Match B output: The PB6 pin can serve as an external output for the
Timer/Counter1 Output Compare B. The pin has to be configured as an output (DDB6 set (one))
to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.
PCINT14, Pin Change Interrupt Source 14: The PB6 pin can serve as an external interrupt
source.
OC1A/PCINT13, Bit 5
OC1A, Output Compare Match A output: The PB5 pin can serve as an external output for the
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDB5 set (one))
to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.
PCINT13, Pin Change Interrupt Source 13: The PB5 pin can serve as an external interrupt
source.
OC0A/PCINT12, Bit 4
OC0A, Output Compare Match A output: The PB4 pin can serve as an external output for the
Timer/Counter0 Output Compare A. The pin has to be configured as an output (DDB4 set (one))
to serve this function. The OC0A pin is also the output pin for the PWM mode timer function.
PCINT12, Pin Change Interrupt Source 12: The PB4 pin can serve as an external interrupt
source.
MISO/PCINT11 – Port B, Bit 3
MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,
this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as
a Slave, the data direction of this pin is controlled by DDB3. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB3 bit.
PCINT11, Pin Change Interrupt Source 11: The PB3 pin can serve as an external interrupt
source.
MOSI/PCINT10 – Port B, Bit 2
MOSI: SPI Master Data output, Slave Data input for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB2. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB2. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB2 bit.
PCINT10, Pin Change Interrupt Source 10: The PB2 pin can serve as an external interrupt
source.
SCK/PCINT9 – Port B, Bit 1
SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB1. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB1. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB1 bit.
PCINT9, Pin Change Interrupt Source 9: The PB1 pin can serve as an external interrupt source.
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