參數(shù)資料
型號: SC16C754BIBM,151
廠商: NXP Semiconductors
文件頁數(shù): 14/50頁
文件大小: 0K
描述: IC UART QUAD W/FIFO 64-LQFP
產(chǎn)品培訓(xùn)模塊: Stand-Alone UARTs
標(biāo)準(zhǔn)包裝: 250
通道數(shù): 4,QUART
FIFO's: 64 字節(jié)
電源電壓: 2.5V,3.3V,5V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 828 (CN2011-ZH PDF)
其它名稱: 568-3290
935279069151
SC16C754BIBM-S
SC16C754B_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 6 October 2008
21 of 51
NXP Semiconductors
SC16C754B
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
7.
Register descriptions
Each register is selected using address lines A0, A1, A2, and in some cases, bits from
other registers. The programming combinations for register selection are shown in
[1]
MCR[7] can only be modied when EFR[4] is set.
[2]
Accessed by a combination of address pins and register bits.
[3]
Accessible only when LCR[7] is logic 1.
[4]
Accessible only when LCR is set to 1011 1111 (BFh).
[5]
Accessible only when EFR[4] = 1 and MCR[6] = 1, that is, EFR[4] and MCR[6] are read/write enables.
[6]
Accessible only when CSA to CSD = 0, MCR[2] = 1, and loopback is disabled (MCR[4] = 0).
Fig 14. Crystal oscillator connection
002aaa870
C2
47 pF
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
C2
33 pF
XTAL1
XTAL2
1.5 k
X1
1.8432 MHz
C1
22 pF
Table 9.
Register map - read/write properties
A2
A1
A0
Read mode
Write mode
0
Receive Holding Register (RHR)
Transmit Holding Register (THR)
0
1
Interrupt Enable Register (IER)
0
1
0
Interrupt Identication Register (IIR)
FIFO Control Register (FCR)
0
1
Line Control Register (LCR)
1
0
Modem Control Register (MCR)[1]
Modem Control Register (MCR)[1]
1
0
1
Line Status Register (LSR)
not applicable
1
0
Modem Status Register (MSR)
not applicable
1
ScratchPad Register (SPR)
0
Divisor Latch LSB (DLL)[2][3]
Divisor Latch LSB (DLL)[2][3]
0
1
Divisor Latch MSB (DLM)[2][3]
0
1
0
Enhanced Feature Register (EFR)[2][4]
Enhanced Feature Register (EFR)[2][4]
1
0
Xon1 word[2][4]
1
0
1
Xon2 word[2][4]
1
0
Xoff1 word[2][4]
1
Xoff2 word[2][4]
1
0
Transmission Control Register
(TCR)[2][5]
Transmission Control Register
1
Trigger Level Register (TLR)[2][5]
Trigger Level Register (TLR)[2][5]
1
FIFO ready register[2][6]
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