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| 鍨嬭櫉锛� | SC16C654BIBM,128 |
| 寤犲晢锛� | NXP Semiconductors |
| 鏂囦欢闋佹暩(sh霉)锛� | 25/58闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC QUAD UART 64BYTE 64LQFP |
| 妯欐簴鍖呰锛� | 2,000 |
| 鐗归粸锛� | 鏁呴殰鍟熷嫊浣嶆娓� |
| 閫氶亾鏁�(sh霉)锛� | 4锛孮UART |
| FIFO's锛� | 64 瀛楃瘈(ji茅) |
| 闆绘簮闆诲锛� | 2.5V锛�3.3V锛�5V |
| 甯惰嚜鍕曟祦閲忔帶鍒跺姛鑳斤細 | 鏄� |
| 甯禝rDA 绶ㄧ⒓鍣�/瑙ｇ⒓鍣細 | 鏄� |
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| 甯惰(di脿o)鍒惰В瑾�(di脿o)鍣ㄦ帶鍒跺姛鑳斤細 | 鏄� |
| 甯禖MOS锛� | 鏄� |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 64-LQFP |
| 渚涙噳鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 64-LQFP锛�7x7锛� |
| 鍖呰锛� | 甯跺嵎 (TR) |
| 鍏跺畠鍚嶇ū锛� | 935279068128 SC16C654BIBM-F SC16C654BIBM-F-ND |
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ATmega164P/324P/644P
7.2.2
Clock Startup Sequence
Any clock source needs a sufficient V
CC to start oscillating and a minimum number of oscillating
cycles before it can be considered stable.
To ensure sufficient V
CC, the device issues an internal reset with a time-out delay (tTOUT) after
the device reset is released by all other reset sources. 鈥淥n-chip Debug System鈥� on page 45
describes the start conditions for the internal reset. The delay (t
TOUT) is timed from the Watchdog
Oscillator and the number of cycles in the delay is set by the SUTx and CKSELx fuse bits. The
selectable delays are shown in Table 7-2. The frequency of the Watchdog Oscillator is voltage
dependent as shown in Section 27. 鈥淎Tmega644P Typical Characteristics鈥� on page 338.
Main purpose of the delay is to keep the AVR in reset until it is supplied with minimum Vcc. The
delay will not monitor the actual voltage and it will be required to select a delay longer than the
Vcc rise time. If this is not possible, an internal or external Brown-Out Detection circuit should be
used. A BOD circuit will ensure sufficient Vcc before it releases the reset, and the time-out delay
can be disabled. Disabling the time-out delay without utilizing a Brown-Out Detection circuit is
not recommended.
The oscillator is required to oscillate for a minimum number of cycles before the clock is consid-
ered stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal
reset active for a given number of clock cycles. The reset is then released and the device will
start to execute. The recommended oscillator start-up time is dependent on the clock type, and
varies from 6 cycles for an externally applied clock to 32K cycles for a low frequency crystal.
The start-up sequence for the clock includes both the time-out delay and the start-up time when
the device starts up from reset. When starting up from Power-save or Power-down mode, Vcc is
assumed to be at a sufficient level and only the start-up time is included.
7.2.3
Clock Source Connections
The pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier which
can be configured for use as an On-chip Oscillator, as shown in Figure 7-2 on page 32. Either a
quartz crystal or a ceramic resonator may be used.
C1 and C2 should always be equal for both crystals and resonators. The optimal value of the
capacitors depends on the crystal or resonator in use, the amount of stray capacitance, and the
electromagnetic noise of the environment. For ceramic resonators, the capacitor values given by
the manufacturer should be used.
Table 7-2.
Number of Watchdog Oscillator Cycles
Typ Time-out (V
CC = 5.0V)
Typ Time-out (V
CC = 3.0V)
Number of Cycles
0 ms
0
4.1 ms
4.3 ms
512
65 ms
69 ms
8K (8,192)
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| SC16C554BIB64,157 | IC UART QUAD SOT314-2 |
| VI-B6B-IY | CONVERTER MOD DC/DC 95V 50W |
| SCC2681AE1A44,518 | IC DUART SOT187-2 |
| VI-B61-IY | CONVERTER MOD DC/DC 12V 50W |
| SCC2692AC1B44,557 | IC UART DUAL W/FIFO 44PQFP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| SC16C654BIBM151 | 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪: 鍒堕€犲晢:NXP 鍔熻兘鎻忚堪: 鍒堕€犲晢:NXP Semiconductors 鍔熻兘鎻忚堪: |
| SC16C654BIBM-F | 鍔熻兘鎻忚堪:UART 鎺ュ彛闆嗘垚闆昏矾 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 鏁�(sh霉)鎿�(j霉)閫熺巼:3 Mbps 闆绘簮闆诲-鏈€澶�:3.6 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:20 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽 / 绠遍珨:LQFP-48 灏佽:Reel |
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| SC16C654BIBS | 鍔熻兘鎻忚堪:UART 鎺ュ彛闆嗘垚闆昏矾 16CB 2.5V-5V 4CH UART 64B FIFO RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 鏁�(sh霉)鎿�(j霉)閫熺巼:3 Mbps 闆绘簮闆诲-鏈€澶�:3.6 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:20 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽 / 绠遍珨:LQFP-48 灏佽:Reel |
| SC16C654BIBS,157 | 鍒堕€犲晢:NXP Semiconductors 鍔熻兘鎻忚堪: |
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