參數(shù)資料
型號: SAK-XC2264-56F66L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 66 MHz, MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù): 21/116頁
文件大小: 1516K
代理商: SAK-XC2264-56F66L
XC2267 / XC2264
XC2000 Family Derivatives
General Device Information
Data Sheet
10
V2.1, 2008-08
Notes to Pin Definitions
1. Ctrl.: The output signal for a port pin is selected by bitfield PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to
1x00B, output O1 is selected by 1x01B, etc.
Output signal OH is controlled by hardware.
2. Type: Indicates the pad type used (St=standard pad, Sp=special pad, DP=double
pad, In=input pad, PS=power supply) and its power supply domain (A, B, M, 1).
Table 4
Pin Definitions and Functions
Pin
Symbol
Ctrl.
Type Function
3
TESTM
IIn/B
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
V
DDPB).
An internal pullup device will hold this pin high
when nothing is driving it.
4
P7.2
O0 / I St/B
Bit 2 of Port 7, General Purpose Input/Output
EMUX0
O1
St/B
External Analog MUX Control Output 0 (ADC1)
TxDC4
O2
St/B
CAN Node 4 Transmit Data Output
CCU62_
CCPOS0A
I
St/B
CCU62 Position Input 0
TDI_C
I
St/B
JTAG Test Data Input
5TRST
IIn/B
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC226x’s debug system.
In this case, pin TRST must be driven low once to
reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
6
P7.0
O0 / I St/B
Bit 0 of Port 7, General Purpose Input/Output
T3OUT
O1
St/B
GPT1 Timer T3 Toggle Latch Output
T6OUT
O2
St/B
GPT2 Timer T6 Toggle Latch Output
TDO_A
OH
St/B
JTAG Test Data Output
ESR2_1
I
St/B
ESR2 Trigger Input 1
RxDC4B
I
St/B
CAN Node 4 Receive Data Input
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