參數(shù)資料
型號(hào): SAK-XC2230L-12F80L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁(yè)數(shù): 67/113頁(yè)
文件大小: 3160K
代理商: SAK-XC2230L-12F80L
XC2230L, XC2234L
XC2000 Family / Econo Line
Functional Description
PRELIMINARY
Data Sheet
53
V1.0, 2010-12
3.18
Power Management
The XC223[04]L provides the means to control the power it consumes either at a given
time or averaged over a certain duration.
Two mechanisms can be used (and partly in parallel):
Clock Generation Management controls the frequency of internal and external
clock signals. Clock signals for currently inactive parts of logic are disabled
automatically. The user can drastically reduce the consumed power by reducing the
XC223[04]L system clock frequency.
External circuits can be controlled using the programmable frequency output
EXTCLK.
Peripheral Management permits temporary disabling of peripheral modules. Each
peripheral can be disabled and enabled separately. The CPU can be switched off
while the peripherals can continue to operate.
Wake-up from power reduction modes can be triggered either externally with signals
generated by the external system, or internally by the on-chip wake-up timer. This
supports intermittent operation of the XC223[04]L by generating cyclic wake-up signals.
Full performance is available to quickly react to action requests while the intermittent
sleep phases greatly reduce the average system power consumption.
Note: When selecting the supply voltage and the clock source and generation method,
the required parameters must be carefully written to the respective bit fields, to
avoid unintended intermediate states. Recommended sequences are provided
which ensure the intended operation of power supply system and clock system.
Please refer to the Programmer’s Guide.
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