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參數(shù)資料
| 型號(hào)： | SAK-C164SL-8RM |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 16-Bit Single-Chip Microcontroller |
| 中文描述： | 16位單片機(jī) |
| 文件頁(yè)數(shù)： | 57/79頁(yè) |
| 文件大?。?/td> | 1314K |
| 代理商： | SAK-C164SL-8RM |
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C164CI/SI
C164CL/SL
Data Sheet
53
V2.0, 2001-05
Direct Drive
When direct drive is configured (CLKCFG = 011
B
) the on-chip phase locked loop is
disabled and the CPU clock is directly driven from the internal oscillator with the input
clock signal.
The frequency of
f
CPU
directly follows the frequency of
f
OSC
so the high and low time of
f
CPU
(i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock
f
OSC
.
The timings listed below that refer to TCLs therefore must be calculated using the
minimum TCL that is possible under the respective circumstances. This minimum value
can be calculated via the following formula:
TCL
min
= 1/
f
OSC
×
DC
min
(DC = duty cycle)
For two consecutive TCLs the deviation caused by the duty cycle of
f
OSC
is compensated
so the duration of 2TCL is always 1/
f
OSC
. The minimum value TCL
min
therefore has to
be used only once for timings that require an odd number of TCLs (1, 3,
…
). Timings that
require an even number of TCLs (2, 4,
…
) may use the formula 2TCL = 1/
f
OSC
.
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