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C161U
Central Processor Unit
Data Sheet
70
2001-04-19
the N-flag can be interpreted as the sign bit of the result (negative: N=’1’, positive:
N=’0’). Negative numbers are always represented as the 2's complement of the
corresponding positive number. The range of signed numbers extends from '–8000
H
'
to '+7FFF
H
' for the word data type, or from '–80
H
' to '+7F
H
' for the byte data type.For
Boolean bit operations with only one operand the N-flag represents the previous state
of the specified bit. For Boolean bit operations with two operands the N-flag
represents the logical XORing of the two specified bits.
C-Flag:
After an addition the C-flag indicates that a carry from the most significant bit
of the specified word or byte data type has been generated. After a subtraction or a
comparison the C-flag indicates a borrow, which represents the logical negation of a
carry for the addition.
This means that the C-flag is set to '1', if
no
carry from the most significant bit of the
specified word or byte data type has been generated during a subtraction, which is
performed internally by the ALU as a 2's complement addition, and the C-flag is
cleared when this complement addition caused a carry.
The C-flag is always cleared for logical, multiply and divide ALU operations, because
these operations cannot cause a carry anyhow.
For shift and rotate operations the C-flag represents the value of the bit shifted out
last. If a shift count of zero is specified, the C-flag will be cleared. The C-flag is also
cleared for a prioritize ALU operation, because a '1' is never shifted out of the MSB
during the normalization of an operand.
For Boolean bit operations with only one operand the C-flag is always cleared. For
Boolean bit operations with two operands the C-flag represents the logical ANDing of
the two specified bits.
V-Flag:
For addition, subtraction and 2's complementation the V-flag is always set to
'1', if the result overflows the maximum range of signed numbers, which are
representable by either 16 bits for word operations ('–8000
H
' to '+7FFF
H
'), or by 8 bits
for byte operations ('–80
H
' to '+7F
H
'), otherwise the V-flag is cleared. Note that the
result of an integer addition, integer subtraction, or 2's complement is not valid, if the
V-flag indicates an arithmetic overflow.
For multiplication and division the V-flag is set to '1', if the result cannot be represented
in a word data type, otherwise it is cleared. Note that a division by zero will always
cause an overflow. In contrast to the result of a division, the result of a multiplication
is valid regardless of whether the V-flag is set to '1' or not.
Since logical ALU operations cannot produce an invalid result, the V-flag is cleared by
these operations.
The V-flag is also used as 'Sticky Bit' for rotate right and shift right operations. With only
using the C-flag, a rounding error caused by a shift right operation can be estimated up
to a quantity of one half of the LSB of the result. In conjunction with the V-flag, the C-flag
allows evaluating the rounding error with a finer resolution (see table below).
For Boolean bit operations with only one operand the V-flag is always cleared.