參數(shù)資料
    

    


    


    
型號：
SAF-XC2786X-96F80L66

    

    
廠商：
INFINEON TECHNOLOGIES AG

    

    
元件分類：
微控制器/微處理器

    

    
英文描述：
32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144

    

    
封裝：
0.50 MM PITCH, GREEN, PLASTIC, LQFP-144

    

    
文件頁數(shù)：
52/120頁

    

    
文件大?。?/td>
1434K

    

    
代理商：
SAF-XC2786X-96F80L66


    

    

    

	
    
    
    

    
    
	
    XC2786X
    XC2000 Family Derivatives
    Functional Description
    Data Sheet
    35
    V2.1, 2008-08
    3.1
    Memory Subsystem and Organization
    The memory space of the XC2786X is configured in the von Neumann architecture. In
    this architecture all internal and external resources, including code memory, data
    memory, registers and I/O ports, are organized in the same linear address space.
    Table 5
    XC2786X Memory Map
    Address Area
    Start Loc. End Loc.
    Area Size1)
    1) The areas marked with “<” are slightly smaller than indicated. See column “Notes”.
    Notes
    IMB register space
    FF’FF00H
    FF’FFFFH
    256 Bytes
    –
    Reserved (Access trap) F0’0000H
    FF’FEFFH <1 Mbyte
    Minus IMB registers
    Reserved for EPSRAM E8’8000H
    EF’FFFFH 480 Kbytes
    Mirrors EPSRAM
    Emulated PSRAM
    E8’0000H
    E8’7FFFH
    32 Kbytes
    Flash timing
    Reserved for PSRAM
    E0’8000H
    E7’FFFFH 480 Kbytes
    Mirrors PSRAM
    Program SRAM
    E0’0000H
    E0’7FFFH
    32 Kbytes
    Maximum speed
    Reserved for pr. mem.
    CC’0000H
    DF’FFFFH <1.25 Mbytes –
    Program Flash 2
    C8’0000H
    CB’FFFFH 256 Kbytes
    –
    Program Flash 1
    C4’0000H
    C7’FFFFH 256 Kbytes
    –
    Program Flash 0
    C0’0000H
    C3’FFFFH 256 Kbytes
    2)
    2) The uppermost 4-Kbyte sector of the first Flash segment is reserved for internal use (C0’F000H to C0’FFFFH).
    External memory area
    40’0000H
    BF’FFFFH 8 Mbytes
    –
    Available Ext. IO area3)
    3) Several pipeline optimizations are not active within the external IO area. This is necessary to control external
    peripherals properly.
    20’5800H
    3F’FFFFH
    < 2 Mbytes
    Minus USIC/CAN
    USIC registers
    20’4000H
    20’57FFH
    6 Kbytes
    Accessed via EBC
    MultiCAN registers
    20’0000H
    20’3FFFH
    16 Kbytes
    Accessed via EBC
    External memory area
    01’0000H
    1F’FFFFH
    < 2 Mbytes
    Minus segment 0
    SFR area
    00’FE00H
    00’FFFFH
    0.5 Kbyte
    –
    Dual-Port RAM
    00’F600H
    00’FDFFH 2 Kbytes
    –
    Reserved for DPRAM
    00’F200H
    00’F5FFH
    1 Kbyte
    –
    ESFR area
    00’F000H
    00’F1FFH
    0.5 Kbyte
    –
    XSFR area
    00’E000H
    00’EFFFH
    4 Kbytes
    –
    Data SRAM
    00’A000H
    00’DFFFH
    16 Kbytes
    –
    Reserved for DSRAM
    00’8000H
    00’9FFFH
    8 Kbytes
    –
    External memory area
    00’0000H
    00’7FFFH
    32 Kbytes
    –
    
    
    
    
    
    


    


    

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