參數(shù)資料
型號(hào)： SAF-XC2220L-20F80V
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQCC48
封裝： 0.50 MM PITCH, GREEN, PLASTIC, VQFN-48
文件頁數(shù)： 97/112頁
文件大?。?/td> 3122K
代理商： SAF-XC2220L-20F80V
XC2220L, XC2224L
XC2000 Family / Econo Line
Electrical Parameters
PRELIMINARY
Data Sheet
81
V1.0, 2010-12
4.6.2
Definition of Internal Timing
The internal operation of the XC222[04]L is controlled by the internal system clock
f
SYS.
Because the system clock signal
f
SYS can be generated from a number of internal and
external sources using different mechanisms, the duration of the system clock periods
(TCSs) and their variation (as well as the derived external timing) depend on the
mechanism used to generate
f
SYS. This must be considered when calculating the timing
for the XC222[04]L.
Figure 16
Generation Mechanisms for the System Clock
Note: The example of PLL operation shown in Figure 16 uses a PLL factor of 1:4; the
example of prescaler operation uses a divider factor of 2:1.
The specification of the external timing (AC Characteristics) depends on the period of the
system clock (TCS).
M C_XC2X_CLOCKGEN
Phase Locked Loop Operation (1:N)
f
IN
Direct Clock Drive (1:1)
Prescaler Operation (N:1)
f
SYS
f
IN
f
SYS
f
IN
f
SYS
TCS
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