參數(shù)資料
型號(hào)： SAF-C868-1RR
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PDSO38
封裝： PLASTIC, TSSOP-38
文件頁(yè)數(shù)： 17/70頁(yè)
文件大?。?/td> 1067K
代理商： SAF-C868-1RR
C868
Data Sheet
24
V 0.2, 2002-01
0.1
Special Function Registers
All registers, except the program counter and the four general purpose register banks,
reside in the special function register area. The special function register area consists
of two portions: the standard special function register area and the mapped special
function register area. For accessing the mapped special function area, bit RMAP in
special function register SYSCON0 must be set. All other special function registers are
located in the standard special function register area which is accessed when RMAP is
cleared (“0“).
As long as bit RMAP is set, the mapped special function register area can be accessed.
This bit is not cleared automatically by hardware. Thus, when non-mapped/mapped
registers are to be accessed, the bit RMAP must be cleared/set respectively by software.
The 109 special function registers (SFR) include pointers and registers that provide an
interface between the CPU and the other on-chip peripherals. All available SFRs whose
address bits 0-2 are 0 (e.g. 80H, 88H, 90H, ..., F0H, F8H ) are bit- addressable. Totally
there are 128 directly addressable bits within the SFR area.
All SFRs are listed in Table 6 and Table 7.
In Table 6 they are organized in groups which refer to the functional blocks of the C868-
1R, C868-1S. Table 7 illustrates the contents (bits) of the SFRs
SYSCON0
System Control Register 0
[Reset value: XX10XXX1B]
765
4321
0
--
EALE
RMAP
-
XMAP0
r
rw
r
rw
The functions of the shaded bits are not described here
Field
Bits
Typ Description
RMAP
4rw
Special Function Register Map Control
RMAP = 0 : The access to the non-mapped (standard)
special function register area is enabled.
RMAP = 1 : The access to the mapped special function
register area is enabled.
-
[7:2]
r
reserved;
returns ’0’ if read; should be written with ’0’;
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