參數(shù)資料
型號(hào)： SAF-C517A-L
廠商： SIEMENS AG
元件分類： 8位微控制器
英文描述： 8 BIT CMOS MICROCONTROLLER
中文描述： 8位CMOS單片機(jī)
文件頁(yè)數(shù)： 62/72頁(yè)
文件大?。?/td> 845K
代理商： SAF-C517A-L
C517A
Semiconductor Group
60
AC Characteristics (24 MHz)
(Operating Conditions apply)
(
C
L
for port 0, ALE and PSEN outputs = 100 pF;
C
L
for all other outputs = 80 pF)
Program Memory Characteristics
*)
Interfacing the C517A to devices with float times up to 37 ns is permissible. This limited bus contention will not
cause any damage to port 0 drivers.
CLKOUT Characteristics
Parameter
Symbol
Limit Values
Unit
24 MHz
Clock
Variable Clock
1/
t
CLCL
= 3.5 MHz to 24 MHz
min.
2
t
CLCL
– 40
t
CLCL
– 25
t
CLCL
– 25
–
t
CLCL
– 20
3
t
CLCL
– 30
–
min.
max.
max.
ALE pulse width
t
LHLL
t
AVLL
t
LLAX
t
LLIV
t
LLPL
t
PLPH
t
PLIV
t
PXIX
t
PXIZ*)
t
PXAV*)
t
AVIV
t
AZPL
43
–
–
ns
Address setup to ALE
17
–
–
ns
Address hold after ALE
17
–
–
4
t
CLCL
– 87
–
ns
ALE low to valid instruction in
–
80
ns
ALE to PSEN
22
–
ns
PSEN pulse width
95
–
–
3
t
CLCL
– 65
–
t
CLCL
– 10
–
5
t
CLCL
– 60
–
ns
PSEN to valid instruction in
–
60
ns
Input instruction hold after PSEN
0
–
0
ns
Input instruction float after PSEN
–
32
–
t
CLCL
– 5
–
ns
Address valid after PSEN
37
–
ns
Address to valid instr in
–
148
ns
Address float to PSEN
0
–
0
ns
Parameter
Symbol
Limit Values
Unit
24 MHz
Clock
Variable Clock
1/
t
CLCL
= 3.5 MHz to 24 MHz
min.
7
t
CLCL
– 40
2
t
CLCL
– 40
10
t
CLCL
– 40
t
CLCL
– 40
min.
max.
max.
ALE to CLKOUT
t
LLSH
t
SHSL
t
SLSH
t
SLLH
252
–
–
ns
CLKOUT high time
43
–
–
ns
CLKOUT low time
377
–
–
t
CLCL
+ 40
ns
CLKOUT low to ALE high
2
82
ns
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