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參數資料
| 型號： | SAF-C517A-L |
| 廠商： | SIEMENS AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 BIT CMOS MICROCONTROLLER |
| 中文描述： | 8位CMOS單片機 |
| 文件頁數： | 50/72頁 |
| 文件大小： | 845K |
| 代理商： | SAF-C517A-L |
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C517A
Semiconductor Group
48
Fail Save Mechanisms
The C517A offers enhanced fail safe mechanisms, which allow an automatic recovery from
software upset or hardware failure :
– a programmable watchdog timer (WDT), with variable time-out period from 512
μ
s up to
approx. 1.1 s at 12 MHz. (256
μ
s up to approx. 0.65 s at 24 MHz)
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into reset state in case the on-chip oscillator fails; it also provides the clock for
a fast internal reset after power-on.
The watchdog timer in the C517A is a 15-bit timer, which is incremented by a count rate of
f
OSC
/24
up to
f
OSC
/384. The system clock of the C517A is divided by two prescalers, a divide-by-two and a
divide-by-16 prescaler. For programming of the watchdog timer overflow rate, the upper 7 bit of the
watchdog timer can be written.
Figure 24
shows the block diagram of the watchdog timer unit.
Figure 24
Block Diagram of the Watchdog Timer
The watchdog timer can be started by software (bit SWDT) or by hardware through pin PE/SWD,
but it cannot be stopped during active mode of the C517A. If the software fails to refresh the running
watchdog timer an internal reset will be initiated on watchdog timer overflow. For refreshing of the
watchdog timer the content of the SFR WDTREL is transfered to the upper 7-bit of the watchdog
timer. The refresh sequence consists of two consequtive instructions which set the bits WDT and
SWDT each. The reset cause (external reset or reset caused by the watchdog) can be examined
by software (flag WDTS). It must be noted, however, that the watchdog timer is halted during the
idle mode and power down mode of the processor.
MCB03250
IP0 (A9H
-
OSC
f
WDTS
-
-
-
-
-
-
2
16
14
0
7
8
WDTL
WDTH
/12
External HW Reset
External HW Power-Down
PE/SWD
Control Logic
IEN0 (A8 )H
IEN1 (B8 )H
6
7
0
WDT Reset-Request
WDTPSEL
WDTREL (86H
-
WDT
-
-
-
-
-
-
-
SWDT
-
-
-
-
-
-
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