參數(shù)資料
型號(hào): SAF-C515A-LM
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 18 MHz, MICROCONTROLLER, PQFP80
封裝: METRIC, PLASTIC, QFP-80
文件頁(yè)數(shù): 42/58頁(yè)
文件大?。?/td> 634K
代理商: SAF-C515A-LM
Semiconductor Group
47
1997-10-01
C515A
Notes:
1) VAIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in
these cases will be X000H or X3FFH, respectively.
2) During the sample time the input capacitance CAIN can be charged/discharged by the external source. The
internal resistance of the analog source must allow the capacitance to reach their final voltage level within tS.
After the end of the sample time tS, changes of the analog input voltage have no effect on the conversion
result.
3) This parameter includes the sample time tS, the time for determining the digital result and the time for the
calibration. Values for the conversion clock tADC depend on programming and can be taken from the table on
the previous page.
4) TUE is tested at VAREF = 5.0 V, VAGND = 0 V, VCC = 4.9 V. It is guaranteed by design characterization for all
other voltages within the defined voltage range.
If an overload condition occurs on maximum 2 not selected analog input pins and the absolute sum of input
overload currents on all analog input pins does not exceed 10 mA, an additional conversion error of 1/2 LSB
is permissible.
5) During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
resistance of the reference source must allow the capacitance to reach their final voltage level within the
indicated time. The maximum internal resistance results from the programmed conversion timing.
6) Not 100% tested, but guaranteed by design characterization.
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