參數(shù)資料
型號(hào)： SAF-C515A-LM
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 18 MHz, MICROCONTROLLER, PQFP80
封裝： METRIC, PLASTIC, QFP-80
文件頁(yè)數(shù)： 31/58頁(yè)
文件大小： 634K
代理商： SAF-C515A-LM
Semiconductor Group
37
1997-10-01
C515A
Fail Save Mechanisms
The C515A offers enhanced fail safe mechanisms, which allow an automatic recovery from
software upset or hardware failure:
– a programmable watchdog timer (WDT), with variable time-out period from 512
s up to
approx. 1.1 s at 12 MHz (256
s up to approx. 0.65 s at 24 MHz)
– an oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
microcontroller into reset state in case the on-chip oscillator fails; it also provides the clock for
a fast internal reset after power-on.
The watchdog timer in the C515A is a 15-bit timer, which is incremented by a count rate of
f
OSC/24
up to
f
OSC/384. The system clock of the C515A is divided by two prescalers, a divide-by-two and a
divide-by-16 prescaler. For programming of the watchdog timer overflow rate, the upper 7 bit of the
watchdog timer can be written. Figure 15 shows the block diagram of the watchdog timer unit.
Figure 17
Block Diagram of the Watchdog Timer
The watchdog timer can be started by software (bit SWDT) or by hardware through pin PE/SWD,
but it cannot be stopped during active mode of the C515A. If the software fails to refresh the running
watchdog timer an internal reset will be initiated on watchdog timer overflow. For refreshing of the
watchdog timer the content of the SFR WDTREL is transferred to the upper 7-bit of the watchdog
timer. The refresh sequence consists of two consecutive instructions which set the bits WDT and
SWDT each. The reset cause (external reset or reset caused by the watchdog) can be examined
by software (flag WDTS). It must be noted, however, that the watchdog timer is halted during the
idle mode and power down mode of the processor.
MCB03250
IP0 (A9 )
H
OSC
f
WDTS
-
------
2
16
14
07
8
WDTL
WDTH
/12
External HW Reset
External HW Power-Down
PE/SWD
Control Logic
IEN0 (A8 )H
IEN1 (B8 )H
6
70
WDT Reset-Request
WDTPSEL
WDTREL (86 )
H
-
WDT
--
-
--
-
SWDT
--
-
--
相關(guān)PDF資料
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參數(shù)描述
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