參數(shù)資料
型號: SAF-C165-LF3V
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller
中文描述: 16位單片機
文件頁數(shù): 51/77頁
文件大小: 1371K
代理商: SAF-C165-LF3V
C165
Data Sheet
47
V2.0, 2000-12
Address float after RdCS,
WrCS (with RW delay)
Address float after RdCS,
WrCS (no RW delay)
RdCS to Valid Data In
(with RW delay)
RdCS to Valid Data In
(no RW delay)
RdCS, WrCS Low Time
(with RW delay)
RdCS, WrCS Low Time
(no RW delay)
Data valid to WrCS
t
44
CC
0
0
ns
t
45
CC
20
TCL
ns
t
46
SR
16 +
t
C
2TCL - 24
+
t
C
3TCL - 24
+
t
C
ns
t
47
SR
36 +
t
C
ns
t
48
CC
30 +
t
C
2TCL - 10
+
t
C
3TCL - 10
+
t
C
2TCL - 14
+
t
C
0
ns
t
49
CC
50 +
t
C
ns
t
50
CC
26 +
t
C
ns
Data hold after RdCS
Data float after RdCS
t
51
t
52
SR
SR
0
20 +
t
F
2TCL - 20
+
t
F
ns
ns
Address hold after
RdCS, WrCS
Data hold after WrCS
t
54
CC
20 +
t
F
2TCL - 20
+
t
F
2TCL - 20
+
t
F
ns
t
56
CC
20 +
t
F
ns
1)
These parameters refer to the latched chip select signals (CSxL). The early chip select signals (CSxE) are
specified together with the address and signal BHE (see figures below).
Multiplexed Bus (Standard Supply Voltage Range)
(cont’d)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
t
A
+
t
C
+
t
F
(120 ns at 25 MHz CPU clock without waitstates)
Parameter
Symbol
Max. CPU Clock
= 25 MHz
min.
Variable CPU Clock
1 / 2TCL = 1 to 25 MHz
min.
Unit
max.
max.
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