參數(shù)資料
型號: SAF-C165-LF3V
廠商: INFINEON TECHNOLOGIES AG
英文描述: 16-Bit Single-Chip Microcontroller
中文描述: 16位單片機(jī)
文件頁數(shù): 13/77頁
文件大?。?/td> 1371K
代理商: SAF-C165-LF3V
C165
Data Sheet
9
V2.0, 2000-12
RSTIN
79
81
I/O
Reset Input with Schmitt-Trigger characteristics. A
low level at this pin while the oscillator is running
resets the C165. An internal pullup resistor permits
power-on reset using only a capacitor connected to
V
SS
. A spike filter suppresses input pulses < 10 ns.
Input pulses >100 ns safely pass the filter. The
minimum duration for a safe recognition should be
100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit
BDRSTEN in register SYSCON) the RSTIN line is
internally pulled low for the duration of the internal
reset sequence upon any reset (HW, SW, WDT).
See note below this table.
Note: To let the reset configuration of PORT0 settle
a reset duration of ca. 1 ms is recommended.
Internal Reset Indication Output. This pin is set to a
low level when the part is executing either a
hardware-, a software- or a watchdog timer reset.
RSTOUT remains low until the EINIT (end of
initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low
transition at this pin causes the CPU to vector to the
NMI trap routine. When the PWRDN (power down)
instruction is executed, the NMI pin must be low in
order to force the C165 to go into power down mode.
If NMI is high, when PWRDN is executed, the part
will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
RST
OUT
80
82
O
NMI
81
83
I
Table 2
Symbol Pin Nr
Pin Definitions and Functions
(cont’d)
Pin Nr
MQFP
Outp.
TQFP
Input
Function
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