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參數(shù)資料
| 型號： | SAF-C161S-L25M AA |
| 廠商： | Infineon Technologies |
| 文件頁數(shù)： | 9/75頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 16BIT ROM/LESS MQFP-80-7 |
| 標準包裝： | 1 |
| 系列： | C16xx |
| 核心處理器： | C166 |
| 芯體尺寸： | 16-位 |
| 速度： | 25MHz |
| 連通性： | EBI/EMI，SPI，UART/USART |
| 外圍設備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 63 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 2K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 80-QFP |
| 包裝： | 剪切帶 (CT) |
| 產品目錄頁面： | 736 (CN2011-ZH PDF) |
| 其它名稱： | SAF-C161S-L25MAACT SAF-C161S-L25MAACT-ND SAF-C161S-L25MAAINCT |
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C161S
Functional Description
Data Sheet
13
V1.0, 2003-11
3.3
Central Processing Unit (CPU)
The main core of the CPU consists of a 4-stage instruction pipeline, a 16-bit arithmetic
and logic unit (ALU) and dedicated SFRs. Additional hardware has been spent for a
separate multiply and divide unit, a bit-mask generator and a barrel shifter.
Based on these hardware provisions, most of the C161S’s instructions can be executed
in just one machine cycle which requires 100 ns at 20 MHz CPU clock. For example,
shift and rotate instructions are always processed during one machine cycle
independent of the number of bits to be shifted. All multiple-cycle instructions have been
optimized so that they can be executed very fast as well: branches in 2 cycles, a
16
× 16 bit multiplication in 5 cycles and a 32-/16-bit division in 10 cycles. Another
pipeline optimization, the so-called ‘Jump Cache’, allows reducing the execution time of
repeatedly performed jumps in a loop from 2 cycles to 1 cycle.
Figure 4
CPU Block Diagram
The CPU has a register context consisting of up to 16 wordwide GPRs at its disposal.
These 16 GPRs are physically allocated within the on-chip RAM area. A Context Pointer
(CP) register determines the base address of the active register bank to be accessed by
the CPU at any time. The number of register banks is only restricted by the available
internal RAM space. For easy parameter passing, a register bank may overlap others.
MCB02147
CPU
SP
STKOV
STKUN
Instr. Reg.
Instr. Ptr.
Exec. Unit
4-Stage
Pipeline
MDH
MDL
PSW
SYSCON
Context Ptr.
Mul/Div-HW
R15
R0
General
Purpose
Registers
Bit-Mask Gen
Barrel - Shifter
ALU
(16-bit)
Data Page Ptr.
Code Seg. Ptr.
Internal
RAM
R15
R0
ROM
16
32
BUSCON 0
BUSCON 1
BUSCON 2
BUSCON 3
BUSCON 4
ADDRSEL 4
ADDRSEL 3
ADDRSEL 2
ADDRSEL 1
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SAFC161SL25MAAXT | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 5V 80-Pin MQFP |
| SAF-C161S-LM 3V | 制造商:Infineon Technologies AG 功能描述:IC 16BIT MCU ROM/ROMLESS SMD 161 |
| SAF-C161S-LM 3V AA | 功能描述:16位微控制器 - MCU 16-Bit Single-Chip 3.3V 20MHz ROM less RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| SAF-C161S-LM3V | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
| SAFC161SLM3VAAXT | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 3.3V 80-Pin MQFP |
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