參數(shù)資料
型號(hào): SAF-C161S-L25M AA
廠商: Infineon Technologies
文件頁(yè)數(shù): 75/75頁(yè)
文件大?。?/td> 0K
描述: IC MCU 16BIT ROM/LESS MQFP-80-7
標(biāo)準(zhǔn)包裝: 1
系列: C16xx
核心處理器: C166
芯體尺寸: 16-位
速度: 25MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲(chǔ)器類型: ROMless
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-QFP
包裝: 剪切帶 (CT)
產(chǎn)品目錄頁(yè)面: 736 (CN2011-ZH PDF)
其它名稱: SAF-C161S-L25MAACT
SAF-C161S-L25MAACT-ND
SAF-C161S-L25MAAINCT
C161S
General Device Information
Data Sheet
5
V1.0, 2003-11
Table 2
Pin Definitions and Functions
Symbol Pin
No.
Input
Outp.
Function
XTAL1
XTAL2
2
3
I
O
XTAL1:
Input to the oscillator amplifier and input to the
internal clock generator
XTAL2:
Output of the oscillator amplifier circuit.
To clock the device from an external source, drive XTAL1,
while leaving XTAL2 unconnected. Minimum and maximum
high/low and rise/fall times specified in the AC
Characteristics (see Chapter 5.4) must be observed.
P3
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.12
P3.13
5
6
7
8
9
10
11
12
13
14
15
16
IO
I
O
I
I/O
O
I/O
O
I/O
Port 3 is a 12-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 3 outputs can be configured as
push/pull or open drain drivers.
The following Port 3 pins also serve for alternate functions:
CAPIN
GPT2 Register CAPREL Capture Input
T3OUT
GPT1 Timer T3 Toggle Latch Output
T3EUD
GPT1 Timer T3 External Up/Down Control Input
T4IN
GPT1 Timer T4 Count/Gate/Reload/Capture Inp.
T3IN
GPT1 Timer T3 Count/Gate Input
T2IN
GPT1 Timer T2 Count/Gate/Reload/Capture Inp.
MRST
SSC Master-Receive/Slave-Transmit Inp./Outp.
MTSR
SSC Master-Transmit/Slave-Receive Outp./Inp.
TxD0
ASC0 Clock/Data Output (Async./Sync.)
RxD0
ASC0 Data Input (Async.) or Inp./Outp. (Sync.)
BHE
External Memory High Byte Enable Signal,
WRH
External Memory High Byte Write Strobe
SCLK
SSC Master Clock Output / Slave Clock Input.
P4
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
17
18
19
20
23
24
IO
O
Port 4 is a 6-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state.
Port 4 can be used to output the segment address lines:
A16
Least Significant Segment Address Line
A17
Segment Address Line
A18
Segment Address Line
A19
Segment Address Line
A20
Segment Address Line
A21
Segment Address Line
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