參數(shù)資料
型號: SAB82526N
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 120/126頁
文件大小: 730K
代理商: SAB82526N
Semiconductor Group
120
SAB 82525
SAB 82526
SAF 82525
SAF 82526
Upgrades of HSCX Version V2.1
3
The bits VN3 … VN0 of the Version Status Register (VSTR) contain the value 5 for version
V2.1. All HSCX version numbers are listed below:
Version ID
4
No more timing restrictions exist for
HSCX V2.1
when the CPU accesses the RNR-bit of the
Command Register (CMDR).
RNR Flow Control in Auto-Mode
5
In multipoint configurations using the HDLC normal response mode (NRM) the P-bit of the
control field carries out the polling function. The primary station normally polls the other
secondary stations by transmitting either RR frames with P = 1 or
I
-frames with P = 1.
I
-frames
with P = 0 may be used by the primary station to transmit data to an individual secondary
station without requesting data from this station at the same time. In this case the secondary
station will receive and acknowledge this
I
-frame, but will not react by transmitting any data to
the primary station.
In the following it is assumed that the secondary station is waiting for transmission.
A secondary station using an HSCX VA3 in NRM auto-mode will transmit data to the primary
station after it has received an
I
-frame with of P = 0 or = 1.
The new
HSCX V2.1
handles the P-Bit of
I
-frames according to ISO 4335. It will transmit data
to the primary station after it has received an
I
-frame with P = 1, but not after an
I
-frame has
been received with P = 0.
I
-Frames with P = 0 in NRM Auto-Mode
6
The new
HSCX V2.1
supports back-to-back frame transmission in all clock modes without any
problem, including the strobe modes (clock mode 1 and 5).
Transmission of Back-to-Back Frames
7
The INT output signal of the
HSCX V2.1
does not change its value during a write access to the
HSCX (CS x WR for Intel and DS x WR for Motorola).
INT Output Signal
VN3 … 0
Version
0: 000
VA1
2: 010
VA2
4: 100
VA3
5: 101
V2.1
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