參數(shù)資料
型號: SAA7373GP
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Digital servo processor and Compact Disc decoder CD7
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
文件頁數(shù): 15/60頁
文件大小: 323K
代理商: SAA7373GP
1998 Jul 06
15
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder (CD7)
SAA7373
7.7.3
C
ONCEALMENT
A 1 sample linear interpolator becomes active if a single
sample is flagged as erroneous but cannot be corrected.
The erroneous sample is replaced by a level midway
between the preceding and following samples. Left and
right channels have independent interpolators. If more
than one consecutive non-correctable sample is found, the
last good sample is held. A 1 sample linear interpolation is
then performed before the next good sample (see Fig.10).
In CD ROM modes (i.e. the DAC interface is selected to be
in a CD ROM format) concealment is not executed.
7.7.4
M
UTE
,
FULL SCALE
,
ATTENUATION AND FADE
A digital level controller is present on the SAA7373 which
performs the functions of soft mute, full scale, attenuation
and fade; these are selected via register 0:
Mute: signal reduced to 0 in a maximum of 128 steps;
(3/n) ms.
Attenuate: signal scaled by
12 dB.
Full scale: ramp signal back to 0 dB level. From mute
takes (3/n) ms.
Fade: activates a 128 stage counter which allows the
signal to be scaled up/down by 0.07 dB steps
128 = full scale.
120 =
0.5 dB (i.e. full scale if oversampling filter
used).
32 =
12 dB.
0 = mute.
7.7.5
P
EAK DETECTOR
The peak detector measures the highest audio level
(absolute value) on positive peaks for left and right
channels. The 8 most significant bits are output in the
Q-channel data in place of the CRC bits. Bits 81 to 88
contain the left peak value (bit 88 = MSB) and
bits 89 to 96 contain the right peak value (bit 96 = MSB).
The values are reset after reading Q-channel data via
SDA.
Fig.10 Concealment mechanism.
Interpolation
Hold
Interpolation
MGA372
OK
Error
OK
Error
Error
Error
OK
OK
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