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參數(shù)資料
| 型號： | S6B0708 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64COM/128SEG GRAPHIC DRIVER FOR DOT MATRIX LCD |
| 中文描述： | 64COM/128SEG圖形驅(qū)動(dòng)點(diǎn)陣LCD |
| 文件頁數(shù)： | 10/29頁 |
| 文件大?。?/td> | 288K |
| 代理商： | S6B0708 |
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S6B0708
LCD
64COM/128SEG GRAPHIC DRIVER FOR DOT MATRIX
10
FUNCTIONAL DESCRIPTION
CHIP SELECT INPUT
The S6B0708 has two chip select pins, CS1B and CS2B. It can interface with a microprocessor when these pins
(CS1B or CS2B) are low. When both of these pins are set to high, DB0 to DB7 are at high impedance and RS,
RW, and E inputs are disabled. CS1B pin controls the display status of S1 to S64, and CS2B does that of S65 to
S128. When CS1B and CS2B are low at the same time, it is impossible to execute read operation. Therefore
one of CS1B or CS2B should be set to low ((CS1B = H & CS2B = L) or (CS1B = L & CS2B = H)) in read
operation. The RESETB signal is entered independent of the status of chip select.
Table 2. Relationship Between Chip Select Pins and Read/Write Operation
CS1B
H
L
H
L
CS2B
H
H
L
L
Read Operation
CS1
X
O
X
-
Write Operation
CS1
X
O
X
O
CS2
X
X
O
-
CS2
X
X
O
O
( -: Not recommended,
Ο
: Operation, X: No operation)
MICROPROCESSOR INTERFACE
S6B0708 transfers 8-bit parallel in either direction between the controlling microprocessor and the S6B0708
through the 8-bit I/O buffer (DB0 to DB7). RS, RW and E identify the type of parallel data transfer to be made as
shown below in Table 3.
Table 3. Microprocessor Interface
RS
H
H
L
L
RW
H
L
H
L
Description
Read display data
Write display data
Status read
Write to internal register (instruction)
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