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參數(shù)資料
| 型號： | S6A0032 |
| 元件分類： | 顯示控制器 |
| 英文描述： | 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC138 |
| 封裝： | DIE-138 |
| 文件頁數(shù)： | 15/39頁 |
| 文件大小： | 361K |
| 代理商： | S6A0032 |
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S6A0032
PRELIMINARY SPEC. VER. 0.5
16 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD
18
INITIALIZING
HARDWARE RESET
When the power is turned on, S6A0032 is initialized automatically by the power on reset circuit (refer to figure 8).
In case of RESETB pin becomes "Low" and durable the state for more than 1.2
s (VDD = 3V), S6A0032 can be
initialized too. During the initialization, the following instructions are executed, and BF (Busy Flag) is kept "High"
(busy state) to the end of initialization.
Display Clear
All the DDRAM data is set to "20H"
Return Home
Address counter = "00H"
Entry Mode Set Instruction
I/D = 1: Address counter is set to increment mode.
SH = 0: Entire display shift is disabled.
Display ON / OFF Control Instruction
C = 0: cursor OFF
B = 0: blink OFF
D = 0: display OFF
Function Set Instruction
DL = 1: 8-bit interface mode
CGRAM / DDRAM Address
RAM address counter is set to "00H".
tOFF
VDD
tRDD
0.1VDD
0.9VDD
0.1VDD
VDD
tRDD
≤ 1 ms
Power OFF Time
tOFF
≥ 1 ms
Note: If the upper power conditions are not satisfied in power ON / OFF sequence, the
internal Power On Reset (POR) circuit will not operates normally.
Figure 8. Power ON / OFF Timing
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相關(guān)代理商/技術(shù)參數(shù) |
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