參數(shù)資料
型號: S6A0032
元件分類: 顯示控制器
英文描述: 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC138
封裝: DIE-138
文件頁數(shù): 13/39頁
文件大?。?/td> 361K
代理商: S6A0032
S6A0032
PRELIMINARY SPEC. VER. 0.5
16 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD
16
Cursor or Display Shift
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
S/C
R/L
-
Without writing or reading of display data, shift right / left the cursor position or display. This instruction is used to
correct or search display data (refer to table 10). Note that display shift is performed simultaneously in all the line.
When displayed data is shifted repeatedly, each line shifted individually. When display shift is performed, the
contents of address counter are not changed.
Table 10. Shift Patterns According to S/C and R/L Bits
S/C
R/L
Operation
0
Shift cursor to the left, AC is decreased by 1
0
1
Shift cursor to the right, AC is increased by 1
1
0
Shift all the display to the left, cursor moves according to the display
1
Shift all the display to the right, cursor moves according to the display
Function Set
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
DL
-
DL: Interface Data Length Control Bit
When DL = "High", it means 8-bit bus mode with MPU.
When DL = "Low", it means 4-bit bus mode with MPU.
When 4-bit bus mode, it needs to transfer 4-bit data by two times.
CGRAM Address Set
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
0
A3
A2
A1
A0
Set CGRAM address to AC. This instruction makes CGRAM data available from MPU for user defined character
pattern. CGRAM address is from 00h to 0Fh.
DDRAM Address Set
RS
R/W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
A6
A5
A4
A3
A2
A1
A0
Set DDRAM address to AC. Before writing / reading data into / from the RAM, set the address by RAM Address Set
instruction. Next, when data are written / read in succession, the address is automatically increased by 1 (when I/D
= "High") or decreased by 1 (when I/D = "Low"). The address ranges are 00h to 0Fh (1st line) and 40h to 4Fh (2nd
line).
相關PDF資料
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S6A0069 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC80
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