參數(shù)資料
型號(hào): S5T8554B03-D0B0
元件分類: 編解碼器
英文描述: MU-LAW, PCM CODEC, PDIP16
封裝: DIP-16
文件頁(yè)數(shù): 3/12頁(yè)
文件大小: 260K
代理商: S5T8554B03-D0B0
CODEC FOR DIGITAL ANSWERING PHONE
S5T8554B
11
APPLICATION CIRCUIT
NOTES:
1.
Supposing desired Line Termination Impedance RL = 600
It is 0 dBm - 0.77459 Vrms
2.
Tx Gain = 20 log ( R2 / R1) , R1 + R2 < 100k
or The Correspondence of 0 dBm0 = 4 dBm
Selection of Master Clock Frequency
BCLKR / CLKSEL
Master Clock Frequency
Clocked
0
1( or Open )
1.536 / 1.544MHz
2.048MHz
1.536 / 1.544MHz
4
14
2
1
15
16
3
8
0.
1u
F
0.
1u
F
+5V
-5V
11
6
10
9
10
9
R1
R2
R5
R4
R3
From Mic
To Speaker
GSx
R6
VFxI-
VFRO
VFxI+
PDN
CLKSEL
FSR
FSx
MCLKx
BCLKx
DR
Dx
Vcc
VBB
GND
DR
Dx
Clock
-law only
Frame sync
PDN
S5T8554B
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