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參數(shù)資料
| 型號(hào)： | S5D2510 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | stand-alone OSD Processor |
| 中文描述： | 獨(dú)立OSD處理器 |
| 文件頁數(shù)： | 10/32頁 |
| 文件大?。?/td> | 267K |
| 代理商： | S5D2510 |
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S5D2510
OSD PROCESSOR FOR MONITOR (PRELIMINARY)
10
FUNCTIONAL DESCRIPTIONS
DATA TRANSMISSION
The communication interface between S5D2510 and MCU follows the I
2
C protocol. As shown in "Figure 6 : Data
Transmission Format", It supports two formats to transmit 16-bits register values effectively. After the starting
pulse, the transmission takes place in the following order: Slave address with R/ W bit, each 1-byte row/ column
address, 2-byte data, and stop condition. An acknowledge signal is received for each byte, excluding only the
start/ stop condition. It assigns 8-bits out of 16-bits to font address for selecting character code, because attribute
bits of the "Character & Attribute Registers" is composed of 8-bits for convenient adjustment with font unit. By the
way, S5D2510 needs 9-bits for addressing 464-fonts by reason that it supports 464-fonts.
Therefore, the needed 1-bit is assigned to the RMSB of column address bit pattern as follows "Address Bit
Pattern for Display Registers Data". For using the RMSB, it must be enabled the COLEN bit of row address bit
pattern.
S5D2510's slave address is BAh. It is BBh in read mode, and BAh in write mode.
Address Bit Pattern for Display Registers Data
(a) Row Address Bit Pattern R3 - R0 : Valid Data for Row Address
A15
COLEN
COLEN : Column Data Format Enable
A14
X
A13
X
A12
C4
A11
R3
A10
R2
A9
R1
A8
R0
(b) Column Address Bit Pattern C4 - C0 : Valid Data for Column Address
A7
A6
X
A5
X
A4
C4
A3
C3
A2
C2
A1
C1
A0
C0
RMSB
RMSB : ROM Address MSB Bit 'X' : Don't care bit
Data Transmission Format
DATA FORMAT 1 : INCREMENT DATA FORMAT
DATA FORMAT 2 : COLUMN DATA FORMAT
START
SLAVE
A
ROW
A
COLUMN1
A
DATA1
A
DATA1
A
COLUMN2
A
DATA2
A
DATA2
A
STOP
START
SLAVE
A
ROW
A
COLUMN1
A
DATA1
A
DATA1
A
DATA2
A
DATA2
A
STOP
Figure 6: Data Transmission Formats
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