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參數(shù)資料
| 型號： | S3P821A-TW |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, TQFP-80 |
| 文件頁數(shù)： | 31/33頁 |
| 文件大?。?/td> | 281K |
| 代理商： | S3P821A-TW |
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S3C821A/P821A
PRODUCT OVERVIEW
1-7
Table 1-1. S3C821A Pin Descriptions (Continued)
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Numbers (note)
Share
Pins
V
SS1, VDD1
–
Power input pins for internal power block
–
10, 11 (12, 13)
–
X
OUT, XIN
–
Main oscillator pins
–
12, 13 (14, 15)
–
TEST
–
Chip test input pin
Hold GND when the device is operating
–
14 (16)
–
XT
IN, XTOUT
–
Sub oscillator pins for sub-system clock
–
15, 16 (17,18)
–
RESET
I
RESET signal input pin. Schmitt trigger
input with internal pull-up resistor.
B
17 (19)
–
INT0–INT3
I/O
External interrupts input with noise filter.
D-4
20–23 (22–25)
P2.4–P2.7
T0CK
I/O
8Bit Timer 0 external clock input.
D-4
20 (22)
P2.4
T1CK
I/O
Timer 1/A external clock input.
D-4
21 (23)
P2.5
TA
I/O
Timer 1/A clock output
D-4
22 (24)
P2.6
TB
I/O
Timer B clock output
D-4
23 (25)
P2.7
T0
I/O
Timer 0 clock output
D-4
33 (35)
P3.7
T0PWM
I/O
Timer 0 PWM output
D-4
33 (35)
P3.7
T0CAP
I/O
Timer 0 capture input
D-4
33 (35)
P3.7
ADC0–ADC3
I/O
Analog input pins for A/D converts
module
F-16
25–28 (27–30)
P3.0–P3.3
AV
REF, AVSS
–
A/D converter reference voltage and
ground
–
24, 29 (26, 31)
–
INT4–INT11
I/O
External interrupts input with noise filter.
E-4
34–41 (36–43)
P4.0–P4.7
BUZ
I/O
Buzzer signal output
D-4
45 (47)
P5.3
SCK, SI, SO
I/O
Serial clock, serial data input, serial data
output
D-4
42–44 (44–46)
P5.0–P5.2
V
LC1
–
LCD bias voltage input pins
–
49 (51)
–
V
SS2, VDD2
–
Power input pins for external power block
–
50, 51 (52, 53)
–
COM0–COM3
O
LCD Common signal output
H-30
52–55 (54–57)
–
SEG0–SEG3
(COM4–COM7)
O
LCD Common or Segment signal output
H-31
56–59 (58–61)
–
SEG4–SEG15
O
LCD segment signal output
H-29
60–71 (62–73)
–
NOTE: Parentheses indicate pin number for 80-QFP package.
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