參數(shù)資料
型號: S3P821A-TW
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, TQFP-80
文件頁數(shù): 30/33頁
文件大?。?/td> 281K
代理商: S3P821A-TW
PRODUCT OVERVIEW
S3C821A/P821A
1-6
PIN DESCRIPTIONS
Table 1-1. S3C821A Pin Descriptions
Pin
Names
Pin
Type
Pin
Description
Circuit
Type
Pin
Numbers (note)
Share
Pins
P0.0–P0.7
I/O
4-bit-programmable I/O port.
Pull-up resistors and open-drain outputs
are software assignable. Pull-up resistors
are automatically disabled for output
pins. Configurable as LCD segments/
external interface address and data lines
H-32
72–79
(74-80, 1)
SEG16/A8
SEG23/A15
P1.0–1.7
I/O
4-bit-programmable I/O port.
Pull-up resistors and open-drain outputs
are software assignable. Pull-up resistors
are automatically disabled for output
pins. Configurable as LCD segments/
external interface address and data lines
H-32
80, 1–7
(2-9)
SEG24/AD0
SEG31/AD7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
I/O
1-bit-programmable I/O port.
Pull-up resistors are software assignable,
and automatically disabled for output
pins. P2.0–P2.3 can alternately be used
as external interface lines. P2.4–P2.7 are
configurable as alternate functions or
external interrupts at falling edge with
noise filters.
D-4
8 (10)
9 (11)
18 (20)
19 (21)
20 (22)
21 (23)
22 (24)
23 (25)
AS
DR
DW
DM
INT0/T0CK
INT1/T1CK
INT2/TA
INT3/TB
P3.0–P3.3
P3.4–P3.6
P3.7
I/O
1-bit-programmable I/O port.
Pull-up resistors are software assignable,
and automatically disabled for output
pins. P3.0–P3.3 can alternately be used
as ADC. P3.7 is configurable as an
alternate function.
F-16
D-4
25–28
(27–30)
30–32
(32–34)
33 (35)
ADC0–ADC3
T0/T0PWM/
T0CAP
P4.0–P4.7
I/O
1-bit-programmable I/O port.
Pull-up resistors and open-drain outputs
are software assignable. Pull-up resistors
are automatically disabled for output
pins. P4.0–P4.7 are configurable as
external interrupts at a selectable edge
with noise filters.
E-4
34–41
(36–43)
INT4–INT11
P5.0
P5.1
P5.2
P5.3
P5.4–P5.6
I/O
1-bit-programmable I/O port.
Pull-up resistors are software assignable,
and automatically disabled for output
pins.
P5.0–P5.3 are configurable as alternate
functions. If SCK and SI are used as
input, these pins have noise filters.
D-4
42 (44)
43 (45)
44 (46)
45 (47)
46–48
(48–50)
SCK
SI
SO
BUZ
NOTE: Parentheses indicate pin number for 80-QFP package.
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