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參數(shù)資料
| 型號(hào)： | S3P7048-QZ |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP42 |
| 封裝： | SDIP-42 |
| 文件頁(yè)數(shù)： | 26/38頁(yè) |
| 文件大小： | 249K |
| 代理商： | S3P7048-QZ |
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S3C7044/C7048/P7048
S3P7048 OTP
15-3
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM
Main Chip
During Programming
Pin Name
Pin No.
I/O
Function
P3.1
SDAT
19 (37)
I/O
Serial data pin. Output port when reading and
input port when writing. Can be assigned as a
Input/push-pull output port.
P3.0
SCLK
20 (38)
I/O
Serial clock pin. Input only pin.
TEST
V
PP(TEST)
22 (40)
I
Power supply pin for EPROM cell writing
(indicates that OTP enters into the writing
mode). When 12.5 V is applied, OTP is in writing
mode and when 5 V is applied, OTP is in reading
mode. (Option)
RESET
31 (5)
I
Chip initialization
V
DD/VSS
V
DD/VSS
21/42(39/16)
I
Logic power supply pin. V
DD should be tied to
+5 V during programming.
NOTE: ( ) means the 44-QFP OTP pin number.
Table 15-2. Comparison of S3P7048 and S3C7044/C7048 Features
Characteristic
S3P7048
S3C7044/C7048
Program Memory
8 K-byte EPROM
4 K-byte mask ROM: S3C7044
8 K-byte mask ROM: S3C7048
Operating Voltage (V
DD)
2.0 V to 5.5 V
1.8 V to 5.5V
OTP Programming Mode
V
DD = 5 V, VPP(TEST)=12.5V
Pin Configuration
42SDIP, 44QFP
EPROM Programmability
User Program 1 time
Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
PP(TEST) pin of the S3P7048, the EPROM programming mode is entered. The
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 15-3 below.
Table 15-3. Operating Mode Selection Criteria
VDD
Vpp
(TEST)
REG/
MEM
Address
(A15-A0)
R/W
Mode
5 V
0
0000H
1
EPROM read
12.5 V
0
0000H
0
EPROM program
12.5 V
0
0000H
1
EPROM verify
12.5 V
1
0E3FH
0
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
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