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參數(shù)資料
| 型號(hào)： | S3CB519XX-TX |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 10.24 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, TQFP-100 |
| 文件頁(yè)數(shù)： | 15/29頁(yè) |
| 文件大?。?/td> | 185K |
| 代理商： | S3CB519XX-TX |
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ELECTRICAL DATA
S3CB519/FB519
22-10
Table 22-9. Main Oscillator Frequency (f
OSC1)
(T
A = -40
°C to + 85 °C V
DD = 2.2 V to 5.5 V)
Oscillator
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Crystal/Ceramic
XIN
C1
C2
XOUT
V
DD = 2.2 V–5.5 V
0.4
–
4.1
MHz
V
DD = 2.4 V–5.5 V
6.2
V
DD = 3.0 V–5.5 V
8.2
V
DD = 4.0 V–5.5 V
10.24
External clock
XIN
XOUT
V
DD = 2.2 V–5.5 V
0.4
–
4.1
MHz
V
DD = 2.4 V–5.5 V
6.2
V
DD = 3.0 V–5.5 V
8.2
V
DD = 4.0 V–5.5 V
10.24
RC
XIN
XOUT
R = 20 Kohm, V
DD = 5 V
–
2
–
MHz
NOTE: Oscillation frequency and Xin input frequency data are for oscillator characteristics only.
Table 22-10. Main Oscillator Clock Stabilization Time (T
ST1)
(T
A = -40
°C + 85 °C, V
DD = 4.5 V to 5.5 V)
Oscillator
Test Condition
Min
Typ
Max
Unit
Crystal
V
DD = 4.5 V to 5.5 V
–
10
ms
Ceramic
Stabilization occurs when V
DD is equal to the minimum
oscillator voltage range.
V
DD = 4.5 V to 5.5 V
–
4
ms
External clock
X
IN input high and low level width (tXH, tXL)
50
–
ns
NOTE: Oscillation stabilization time (TST1) is the time required for the CPU clock to return to its normal oscillation
frequency after a power-on occurs, or when Stop mode is ended by a
RESET signal.
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