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| 型號(hào)： | S3C9658XX-SI |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO18 |
| 封裝： | SOP-18 |
| 文件頁(yè)數(shù)： | 47/206頁(yè) |
| 文件大小： | 869K |
| 代理商： | S3C9658XX-SI |
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UNIVERSAL SERIAL BUS
S3C9654/C9658/P9658
11-8
CONTROL ENDPOINT STATUS REGISTER (EP0CSR)
EP0CSR register controls Endpoint 0 (Control Endpoint), and also holds status bits for Endpoint 0. EP0CSR is
located at F1H and is read/write addressable.
Bit7
CLEAR_SETUP_END: MCU writes “1” to this bit to clear SETUP_END bit (bit4). This bit is
automatically cleared after writing "1" by USB block.
Bit6
CLEAR_OUT_PKT_RDY: MCU writes “1” to this bit to clear OUT_PKT_RDY bit (bit0). This bit is
automatically cleared after writing "1" by USB block.
Bit5
SEND_STALL: MCU writes “1” to this bit to send STALL signal to the Host, at the same time it clears
OUT_PKT_RDY (bit0), if it decodes an invalid token. USB issues a STALL Handshake to the current
control transfer. This bit gets cleared once a STALL Handshake is issued to the current control transfer.
Bit4
SETUP_END: USB sets this bit, when a control transfer ends before DATA_END bit (bit3) is set. MCU
clears this bit, by writing a “1” to SERVICED_SETUP_END bit (bit7). When USB sets this bit, an interrupt
is generated to MCU. When such condition occurs, USB flushes the FIFO, and invalidates MCU’s access
to FIFO.
Bit3
DATA_END: MCU sets this bit:
— After loading the last packet of data into the FIFO, and at the same time IN_PKT_RDY bit is set.
— While it clears OUT_PKT_RDY bit after unloading the last packet of data.
— For a zero length data phase, when it clears OUT_PKT_RDY bit, and sets IN_PKT_RDY bit.
Bit2
SENT_STALL: USB sets this bit, if a control transaction has ended due to a protocol violation. An
interrupt is generated when this bit gets set. MCU clears this bit to end the STALL condition.
Bit1
IN_PKT_RDY: MCU sets this bit, after writing a packet of data into Endpoint 0 FIFO. USB clears this bit,
once the packet has been successfully sent to the host. An interrupt is generated when USB clears this
bit so that MCU can load the next packet. For a zero length data phase, MCU sets IN_PKT_RDY bit and
DATA_END bit at the same time.
Bit0
OUT_PKT_RDY: USB sets this bit, once a valid token is written to FIFO. An interrupt is generated,
when USB sets this bit. MCU clears this bit by writing "1” to SERVICED_OUT_PKT_RDY bit.
NOTES:
1.
In control transfer case, where there is no data phase, MCU after unloading the setup token, sets IN_PKT_RDY, and
DATA_END at the same time it clears OUT_PKT_RDY for the setup token.
2.
When SETUP_END bit is set, OUT_PKT_RDY bit may also be set. This happens when the current transfer has ended,
and a new control transfer is received before MCU can service the interrupt. In such case, MCU should first clear
SETUP_END bit, and then start servicing the new control transfer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S3C9654XX-DI | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP18 |
| S3P9658-SI | 8-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO18 |
| S3C9654XX-DH | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP16 |
| S5933Q/7C | PCI BUS CONTROLLER, PQFP160 |
| S5933QE | PCI BUS CONTROLLER, PQFP160 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S3C9688 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:8-bit single-chip CMOS microcontrollers |
| S3CB | 制造商:DIOTECH 制造商全稱(chēng):DIOTECH 功能描述:SURFACE MOUNT GENERAL RECTIFIER |
| S3CB018 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3CB018/FB018 single-chip CMOS microcontroller |
| S3CB205 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:S3CB205/FB205 |
| S3CB519 | 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:8-Bit CMOS Microcontroller |
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