參數(shù)資料
型號: S3C72F5XX-QX
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, QFP-100
文件頁數(shù): 37/41頁
文件大小: 263K
代理商: S3C72F5XX-QX
S3C72F5/P72F5
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1–1. S3C72F5 Pin Descriptions
Pin Name
Pin Type
Description
Number
Share Pin
P0.0
P0.1
P0.2
P0.3
I/O
4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-
drain or push-pull output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
11
12
13
14
SCK/K0
SO/K1
SI/K2
BUZ/K3
P1.0
P1.1
P1.2
P1.3
I
4-bit input port.
1-bit and 4-bit read and test are possible.
4-bit pull-up resistors are assignable by software.
23
24
25
26
INT0
INT1
INT2
INT4
P2.0
P2.1
P2.2
I/O
Same as port 0 except that port 2 is 3-bit I/O port.
27
28
29
CLO
LCDCK
LCDSY
P3.0
P3.1
P3.2
P3.3
I/O
Same as port 0.
30
31
32
33
TCLO0
TCLO1
TCL0
TCL1
P4.0–P4.3
P5.0–P5.3
I/O
4-bit I/O ports.
1-, 4-bit or 8-bit read/write and test are possible.
Individual pins are software configurable as input or
output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
42–45
46–49
COM8–
COM11
COM12–
COM15
P6.0–P6.3
P7.0–P7.3
I/O
Same as P4, P5.
50–53
54–57
SEG55/K4–
SEG52/K7
SEG51–
SEG48
P8.0–P8.3
P9.0–P9.3
I/O
Same as P4, P5.
58–61
62–65
SEG47–
SEG44
SEG43–
SEG40
SCK
I/O
Serial I/O interface clock signal.
11
P0.0/K0
SO
I/O
Serial data output.
12
P0.1/K1
SI
I/O
Serial data input.
13
P0.2/K2
BUZ
I/O
2 kHz, 4 kHz, 8 kHz or 16 kHz frequency output for
buzzer signal.
14
P0.3/K3
INT0, INT1
I
External interrupts. The triggering edge for INT0 and
INT1 is selectable.
23, 24
P1.0, P1.1
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