參數(shù)資料
型號(hào)： S3C72B5XX-QA
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP128
封裝： 14 X 20 MM, QFP-128
文件頁(yè)數(shù)： 32/37頁(yè)
文件大?。?/td> 289K
代理商： S3C72B5XX-QA
PRODUCT OVERVIEW
S3C72B5/C72B7/C72B9/P72B9
1-4
DATA MEMORY
Overview
The 3,584-bit data memory has five areas:
— 32
× 4-bit working register area
— 224
× 4-bit general-purpose area in bank 0 which is also used as the stack area
— 256
× 4-bit general-purpose area in bank 1, bank 2,……, bank 13, respectively
— 256
× 5-bit area for LCD data in bank 14
— 128
× 4-bit area in bank 15 for memory-mapped I/O addresses
The data memory area is also organized as sixteen memory banks — bank 0, bank 1, ….., and bank 15. You use
the select memory bank instruction (SMB) to select one of the banks as working data memory.
Data stored in RAM locations are 1-, 4-, and 8-bit addressable. After a hardware reset, data memory initialization
values must be defined by program code.
Data Memory Addressing Modes
The enable memory bank (EMB) flag controls the addressing mode for data memory banks 0, 1, ….., or 15.
When the EMB flag is logical zero, only locations 00H–7FH of bank 0 and bank 15 can be accessed. When the
EMB flag is set to logical one, all sixteen data memory banks can be accessed based on the current SMB value.
Working Registers
The RAM's working register area in data memory bank 0 is also divided into four register banks. Each register
bank has eight 4-bit registers. Paired 4-bit registers are 8-bit addressable.
Register A can be used as a 4-bit accumulator and double register EA as an 8-bit extended accumulator; double
registers WX, WL and HL are used as address pointers for indirect addressing.
To limit the possibility of data corruption due to incorrect register addressing, it is advisable to use bank 0 for
main programs and banks 1, 2, and 3 for interrupt service routines.
LCD Data Register Area
Bit values for LCD segment data are stored in data memory bank 14. Register locations that are not used to store
LCD data can be assigned to general-purpose use.
Bit Sequential Carrier
The bit sequential carrier (BSC) is a 16-bit general register that you can manipulate using 1-, 4-, and 8-bit RAM
control instructions.
Using the BSC register, addresses and bit locations can be specified sequentially using 1-bit indirect addressing
instructions. In this way, a program can generate 16-bit data output by moving the bit location sequentially,
incrementing or decrementing the value of the L register. You can also use direct addressing to manipulate data
in the BSC.
相關(guān)PDF資料
PDF描述
S3P72G9XX-QX 4-BIT, OTPROM, 4.19 MHz, MICROCONTROLLER, PQFP100
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S3C72N5XX-QW 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP80
S3P72P9-QX 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP100
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S3C72B7 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung A
S3C72B9 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3C72B5/C72B7/C72B9 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung A
S3C72C8 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable M
S3C72E8 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3C72E8/P72E8 is a SAM47 core-based 4-bit CMOS single-chip microcontroller. It has a timer/counter and LCD drivers.
S3C72F5 制造商:SAMSUNG 制造商全稱(chēng):Samsung semiconductor 功能描述:The S3C72F5 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrangeable M
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