參數(shù)資料
型號(hào): S29NS256P0SBJW003
廠商: SPANSION LLC
元件分類: DRAM
英文描述: MirrorBit Flash Family
中文描述: 16M X 16 FLASH 1.8V PROM, 80 ns, PBGA64
封裝: 6.20 X 7.70 MM , LEAD FREE, TFBGA-64
文件頁(yè)數(shù): 3/86頁(yè)
文件大?。?/td> 2234K
代理商: S29NS256P0SBJW003
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
Publication Number
S29NS-P_00
Revision
A
Amendment
1
Issue Date
February 20, 2007
Features
Single 1.8 V read/program/erase (1.70–1.95 V)
90 nm MirrorBit Technology
Multiplexed Data and Address for reduced I/O count
Simultaneous Read/Write operation
Full/Half drive output slew rate control
32-word Write Buffer
Sixteen-bank architecture consisting of
64/32/16 MB for NS512/256/128P, respectively
Four 32 KB sectors at the top of memory array (NS256/128P)
512 128KB sectors (NS512P), 255/127 128KB sectors (NS256/
128P)
Programmable linear (8/16/32) with or without wrap around
and continuous burst read modes
Secured Silicon Sector region consisting of 128 words each
for factory and customer
20-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector (typical)
RDY output indicates data available to system
Command set compatible with JEDEC (42.4) standard
Hardware (WP#) protection of highest two sectors
Top Boot sector configuration (NS256/128P)
Handshaking by monitoring RDY
Offered Packages
– NS512P: 64-ball FBGA (8 mm x 9.2 mm)
– NS256P/NS128P: 44-ball FBGA (6.2 mm x 7.7 mm)
Low V
CC
write inhibit
Persistent and Password methods of Advanced Sector
Protection
Write operation status bits indicate program and erase
operation completion
Suspend and Resume commands for Program and Erase
operations
Unlock Bypass program command to reduce programming
time
Synchronous or Asynchronous program operation,
independent of burst control register settings
V
PP
input pin to reduce factory programming time
Support for Common Flash Interface (CFI)
Performance Characteristics
General Description
The Spansion S29NS512/256/128P are MirrorBit Flash products fabricated on 90 nm process technology. These burst mode
Flash devices are capable of performing simultaneous read and write operations with zero latency on two separate banks using
multiplexed data and address pins. These products can operate up to 108 MHz and use a single V
CC
of 1.7 V to 1.95 V that
makes them ideal for the demanding wireless applications of today that require higher density, better performance, and lowered
power consumption.
S29NS-P MirrorBit
TM
Flash Family
S29NS512P S29NS256P S29NS128P
512/256/128 Mb (32/16/8 M x 16 bit), 1.8 V Burst Simultaneous
Read/Write, Multiplexed MirrorBit Flash Memory
Data Sheet
(Advance Information)
Read Access Times
Speed Option (MHz)
108
Max. Synch. Latency, ns (t
IACC
)
80
Max. Synch. Burst Access, ns (t
BACC
)
7.0
Max. Asynch. Access Time, ns (t
ACC
)
80
Max OE# Access Time, ns (t
OE
)
7.0
Current Consumption (typical values)
Continuous Burst Read @ 108 MHz
42 mA
Simultaneous Operation 108 MHz
60 mA
Program
30 mA
Standby Mode
20 μA
Typical Program & Erase Times
Single Word Programming
30 μs
Effective Write Buffer Programming (V
CC
) Per Word
6 μs
Effective Write Buffer Programming (V
PP
) Per Word
4 μs
Sector Erase (16 Kword Sector)
350 ms
Sector Erase (64 Kword Sector)
600 ms
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29NS256PABBJW000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29NS256PABBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
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S29NS512P0PBJW000 功能描述:閃存 512M (32MX16) 66MHz Simultaneous R/W RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
S29NS512P0PBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family