- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359757 > S29GL128P10FFIV12 (SPANSION LLC) 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology PDF資料下載
參數(shù)資料
| 型號(hào)： | S29GL128P10FFIV12 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| 中文描述： | 128M X 1 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | 13 X 11 MM, 1 MM PITCH, LEAD FREE, FBGA-64 |
| 文件頁(yè)數(shù)： | 48/77頁(yè) |
| 文件大小： | 2121K |
| 代理商： | S29GL128P10FFIV12 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)當(dāng)前第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)
48
S29GL-P MirrorBit
Flash Family
S29GL-P_00_A7 November 8, 2007
D a t a
S h e e t
( P r e l i m i n a r y )
8.5
Advanced Sector Protection Software Examples
Table 8.2
contains all possible combinations of the DYB, PPB, and PPB Lock Bit relating to the status of the
sector. In summary, if the PPB Lock Bit is locked (set to “0”), no changes to the PPBs are allowed. The PPB
Lock Bit can only be unlocked (reset to “1”) through a hardware reset or power cycle. See also
Figure 8.1
for
an overview of the Advanced Sector Protection feature.
8.6
Hardware Data Protection Methods
The device offers two main types of data protection at the sector level via hardware control:
When WP#/ACC is at V
IL
, the either the highest or lowest sector is locked (device specific).
There are additional methods by which intended or accidental erasure of any sectors can be prevented via
hardware means. The following subsections describes these methods:
8.6.1
WP#/ACC Method
The Write Protect feature provides a hardware method of protecting one outermost sector. This function is
provided by the WP#/ACC pin and overrides the previously discussed Sector Protection/Unprotection
method.
If the system asserts V
IL
on the WP#/ACC pin, the device disables program and erase functions in the
highest or lowest sector independently of whether the sector was protected or unprotected using the method
described in
Advanced Sector Protection/Unprotection
on page 42
.
If the system asserts V
IH
on the WP#/ACC pin, the device reverts to whether the boot sectors were last set to
be protected or unprotected. That is, sector protection or unprotection for these sectors depends on whether
they were last protected or unprotected.
The WP#/ACC pin must be held stable during a command sequence execution. WP# has an internal pull-up;
when unconnected, WP# is set at V
IH
.
Note
If WP#/ACC is at V
IL
when the device is in the standby mode, the maximum input load current is increased.
See
Table 11.6 on page 55
for details.
8.6.2
Low V
CC
Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept any write cycles. This protects data during V
CC
power-up and power-down.
The command register and all internal program/erase circuits are disabled, and the device resets to reading
array data. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The system must provide the
proper signals to the control inputs to prevent unintentional writes when V
CC
is greater than V
LKO
.
Table 8.2
Sector Protection Schemes: DYB, PPB and PPB Lock Bit Combinations
Unique Device PPB Lock Bit
0 = locked
1 = unlocked
Sector PPB
0 = protected
1 = unprotected
Sector DYB
0 = protected
1 = unprotected
Sector Protection Status
Any Sector
0
0
x
Protected through PPB
Any Sector
0
0
x
Protected through PPB
Any Sector
0
1
1
Unprotected
Any Sector
0
1
0
Protected through DYB
Any Sector
1
0
x
Protected through PPB
Any Sector
1
0
x
Protected through PPB
Any Sector
1
1
0
Protected through DYB
Any Sector
1
1
1
Unprotected
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL128P10TAI010 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| S29GL128P10TAI012 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| S29GL128P10TAIR10 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| S29GL128P10TAIR12 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| S29GL128P10TAIV10 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL128P10TAI010 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 128Mbit 16M/8M x 8bit/16bit 100ns 56-Pin TSOP Tray 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 128MBIT 16MX8/8MX16 100NS 56TSOP - Trays |
| S29GL128P10TAI020 | 制造商:Spansion 功能描述:FLASH PARALLEL 3V/3.3V 128MBIT 16MX8/8MX16 100NS 56TSOP - Trays |
| S29GL128P10TFI010 | 功能描述:閃存 128Mb 3V 110ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29GL128P10TFI010 | 制造商:Spansion 功能描述:IC SM FLASH 3V 128MB 100NS |
| S29GL128P10TFI010-AU | 制造商:Spansion 功能描述:SPZS29GL128P10TFI010-AU IC 128M PAGE-MO |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。